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authorNick Spence <nick.spence@freescale.com>2006-09-07 07:39:46 -0700
committerKim Phillips <kim.phillips@freescale.com>2006-11-03 19:42:17 -0600
commitf484dc791a3932537213c43c654cc1295c64b84c (patch)
tree4566fa159f8d25114a7b2bce2a2746059ecd88ac /drivers/s3c4510b_uart.c
parentee58ea2689930669678fdcb27bf0cc5c341e18eb (diff)
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Added RGMII support to the TSECs and Marvell 881111 Phy
Added a phy initialization to adjust the RGMII RX and TX timing Always set the R100 bit in 100 BaseT mode regardless of the TSEC mode Signed-off-by: Nick Spence <nick.spence@freescale.com>
Diffstat (limited to 'drivers/s3c4510b_uart.c')
0 files changed, 0 insertions, 0 deletions