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| author | York Sun <york.sun@nxp.com> | 2016-11-16 15:57:52 -0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-11-23 23:42:07 -0800 |
| commit | 83b9bea1166b9223fc409b261bc3a74073645cea (patch) | |
| tree | fa4093faeaa6a3d677d6e4b788fdaf0bc40180fa /drivers/qe | |
| parent | 1cdd96f325340fafdaa4a462e239912febd601a7 (diff) | |
| download | u-boot-imx-83b9bea1166b9223fc409b261bc3a74073645cea.zip u-boot-imx-83b9bea1166b9223fc409b261bc3a74073645cea.tar.gz u-boot-imx-83b9bea1166b9223fc409b261bc3a74073645cea.tar.bz2 | |
powerpc: P1012: Drop configuration for P1012
P1012 is a single-core version of P1021. There is no P1012 target
configured. Drop related macros. P1012 SoC is still supported.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'drivers/qe')
| -rw-r--r-- | drivers/qe/uec.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index 5fd956a..d0398d2 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -567,7 +567,7 @@ static void phy_change(struct eth_device *dev) { uec_private_t *uec = (uec_private_t *)dev->priv; -#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025) +#if defined(CONFIG_P1021) || defined(CONFIG_P1025) ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); /* QE9 and QE12 need to be set for enabling QE MII managment signals */ @@ -578,7 +578,7 @@ static void phy_change(struct eth_device *dev) /* Update the link, speed, duplex */ uec->mii_info->phyinfo->read_status(uec->mii_info); -#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025) +#if defined(CONFIG_P1021) || defined(CONFIG_P1025) /* * QE12 is muxed with LBCTL, it needs to be released for enabling * LBCTL signal for LBC usage. @@ -1193,14 +1193,14 @@ static int uec_init(struct eth_device* dev, bd_t *bd) uec_private_t *uec; int err, i; struct phy_info *curphy; -#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025) +#if defined(CONFIG_P1021) || defined(CONFIG_P1025) ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); #endif uec = (uec_private_t *)dev->priv; if (uec->the_first_run == 0) { -#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025) +#if defined(CONFIG_P1021) || defined(CONFIG_P1025) /* QE9 and QE12 need to be set for enabling QE MII managment signals */ setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE9); setbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12); @@ -1232,7 +1232,7 @@ static int uec_init(struct eth_device* dev, bd_t *bd) udelay(100000); } while (1); -#if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025) +#if defined(CONFIG_P1021) || defined(CONFIG_P1025) /* QE12 needs to be released for enabling LBCTL signal*/ clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_QE12); #endif |