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| author | Dipen Dudhat <dipen.dudhat@freescale.com> | 2009-10-05 15:41:58 +0530 |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2010-04-23 21:02:30 -0500 |
| commit | 77c1458d130d33704472db9c88d2310c8fc90f4c (patch) | |
| tree | e08d7beab6ad02b2e16f719a9869c98afe05c41d /drivers/qe/uec_phy.c | |
| parent | a47a12becf66f02a56da91c161e2edb625e9f20c (diff) | |
| download | u-boot-imx-77c1458d130d33704472db9c88d2310c8fc90f4c.zip u-boot-imx-77c1458d130d33704472db9c88d2310c8fc90f4c.tar.gz u-boot-imx-77c1458d130d33704472db9c88d2310c8fc90f4c.tar.bz2 | |
ppc/85xx: PIO Support for FSL eSDHC Controller Driver
On some Freescale SoC Internal DMA of eSDHC controller has bug.
So PIO Mode has been introduced to do data transfer using CPU.
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Diffstat (limited to 'drivers/qe/uec_phy.c')
0 files changed, 0 insertions, 0 deletions