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authorWolfgang Denk <wd@denx.de>2009-06-14 22:05:42 +0200
committerWolfgang Denk <wd@denx.de>2009-06-14 22:05:42 +0200
commit92afd368bba7d98b2b7bfb51082c3639bb2119b3 (patch)
tree74ffc8a3f4980f7c6bad6bf80bb41d3974eff685 /drivers/qe/qe.h
parent6b1f78ae6ad037382ad430b07064105c88f7ac02 (diff)
parent388517e4b745b00256c2fa201ce7bccb67b4f245 (diff)
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Merge branch 'next' of ../master
Diffstat (limited to 'drivers/qe/qe.h')
-rw-r--r--drivers/qe/qe.h18
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h
index d78edba..faad43c 100644
--- a/drivers/qe/qe.h
+++ b/drivers/qe/qe.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
+ * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
*
* Dave Liu <daveliu@freescale.com>
* based on source code of Shlomi Gridish
@@ -25,7 +25,6 @@
#include "common.h"
-#define QE_NUM_OF_SNUM 28
#define QE_NUM_OF_BRGS 16
#define UCC_MAX_NUM 8
@@ -46,11 +45,16 @@ typedef struct qe_snum {
/* QE RISC allocation
*/
-typedef enum qe_risc_allocation {
- QE_RISC_ALLOCATION_RISC1 = 1, /* RISC 1 */
- QE_RISC_ALLOCATION_RISC2 = 2, /* RISC 2 */
- QE_RISC_ALLOCATION_RISC1_AND_RISC2 = 3 /* RISC 1 or RISC 2 */
-} qe_risc_allocation_e;
+#define QE_RISC_ALLOCATION_RISC1 0x1 /* RISC 1 */
+#define QE_RISC_ALLOCATION_RISC2 0x2 /* RISC 2 */
+#define QE_RISC_ALLOCATION_RISC3 0x4 /* RISC 3 */
+#define QE_RISC_ALLOCATION_RISC4 0x8 /* RISC 4 */
+#define QE_RISC_ALLOCATION_RISC1_AND_RISC2 (QE_RISC_ALLOCATION_RISC1 | \
+ QE_RISC_ALLOCATION_RISC2)
+#define QE_RISC_ALLOCATION_FOUR_RISCS (QE_RISC_ALLOCATION_RISC1 | \
+ QE_RISC_ALLOCATION_RISC2 | \
+ QE_RISC_ALLOCATION_RISC3 | \
+ QE_RISC_ALLOCATION_RISC4)
/* QE CECR commands for UCC fast.
*/