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authorZhao Qiang <B45475@freescale.com>2014-09-25 13:52:25 +0800
committerYork Sun <yorksun@freescale.com>2014-11-19 12:55:45 -0800
commit93d3320417b16f331d5edb87409cd7a347c4eeaa (patch)
tree8713b948e78aa24b73b2a34818e1cb04544e72e3 /drivers/qe/qe.c
parentf196044dfd64745a163773c6c746f9e149ace127 (diff)
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qe: add u-qe support to arm board
ls1021 is arm-core and support qe which is u-qe. add u-qe init for arm board. Signed-off-by: Zhao Qiang <B45475@freescale.com> [York Sun: Fix compiling error caused by u_qe_init()] Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/qe/qe.c')
-rw-r--r--drivers/qe/qe.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 4358a91..b545ec9 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -40,6 +40,7 @@ void qe_issue_cmd(uint cmd, uint sbc, u8 mcn, u32 cmd_data)
return;
}
+#ifdef CONFIG_QE
uint qe_muram_alloc(uint size, uint align)
{
uint retloc;
@@ -70,6 +71,7 @@ uint qe_muram_alloc(uint size, uint align)
return retloc;
}
+#endif
void *qe_muram_addr(uint offset)
{
@@ -180,6 +182,17 @@ void qe_init(uint qe_base)
qe_snums_init();
}
+#ifdef CONFIG_U_QE
+void u_qe_init(void)
+{
+ uint qe_base = CONFIG_SYS_IMMR + 0x01400000; /* QE immr base */
+ qe_immr = (qe_map_t *)qe_base;
+
+ qe_upload_firmware((const void *)CONFIG_SYS_QE_FW_ADDR);
+ out_be32(&qe_immr->iram.iready, QE_IRAM_READY);
+}
+#endif
+
void qe_reset(void)
{
qe_issue_cmd(QE_RESET, QE_CR_SUBBLOCK_INVALID,
@@ -212,6 +225,7 @@ void qe_assign_page(uint snum, uint para_ram_base)
#define BRG_CLK (gd->arch.brg_clk)
+#ifdef CONFIG_QE
int qe_set_brg(uint brg, uint rate)
{
volatile uint *bp;
@@ -239,6 +253,7 @@ int qe_set_brg(uint brg, uint rate)
return 0;
}
+#endif
/* Set ethernet MII clock master
*/