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authorHaiying Wang <Haiying.Wang@freescale.com>2009-05-20 12:30:35 -0400
committerKumar Gala <galak@kernel.crashing.org>2009-06-12 17:17:00 -0500
commit4e7b25e4fe777f525e426cbd58c3a3976c564f2e (patch)
treeb0f1eb7caa4091f95a58502e18fe5a9e4513ea71 /drivers/qe/qe.c
parent7211fbfa18f3061858696150ee6e9e093d9eceae (diff)
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drivers/qe: Add more SNUM number for QE
Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII- 1000 mode. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'drivers/qe/qe.c')
-rw-r--r--drivers/qe/qe.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index f509622..8882c4f 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
+ * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
*
* Dave Liu <daveliu@freescale.com>
* based on source code of Shlomi Gridish
@@ -108,14 +108,23 @@ static void qe_sdma_init(void)
out_be32(&p->sdmr, QE_SDMR_GLB_1_MSK | (0x3 << QE_SDMR_CEN_SHIFT));
}
-static u8 thread_snum[QE_NUM_OF_SNUM] = {
+/* This table is a list of the serial numbers of the Threads, taken from the
+ * "SNUM Table" chart in the QE Reference Manual. The order is not important,
+ * we just need to know what the SNUMs are for the threads.
+ */
+static u8 thread_snum[] = {
0x04, 0x05, 0x0c, 0x0d,
0x14, 0x15, 0x1c, 0x1d,
0x24, 0x25, 0x2c, 0x2d,
0x34, 0x35, 0x88, 0x89,
0x98, 0x99, 0xa8, 0xa9,
0xb8, 0xb9, 0xc8, 0xc9,
- 0xd8, 0xd9, 0xe8, 0xe9
+ 0xd8, 0xd9, 0xe8, 0xe9,
+ 0x08, 0x09, 0x18, 0x19,
+ 0x28, 0x29, 0x38, 0x39,
+ 0x48, 0x49, 0x58, 0x59,
+ 0x68, 0x69, 0x78, 0x79,
+ 0x80, 0x81
};
static void qe_snums_init(void)