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authorSimon Glass <sjg@chromium.org>2015-07-02 18:16:00 -0600
committerSimon Glass <sjg@chromium.org>2015-08-05 21:06:12 -0600
commitd308c0136d8a530d4846ab08ce02e6d40614d7e7 (patch)
tree664cbddfd13be61df58efe17ef007d664f7c52b9 /drivers/power/pmic/s5m8767.c
parent1c88b67ec8faa33c12438cab8a5191bbab6c85e3 (diff)
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dm: power: Add support for the S5M8767 PMIC
This PMIC is used with SoCs which need a combination of BUCKs and LDOs. The driver supports probing and basic register access. It supports the standard device tree binding and supports driver model. A regulator driver can be provided also. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com>
Diffstat (limited to 'drivers/power/pmic/s5m8767.c')
-rw-r--r--drivers/power/pmic/s5m8767.c95
1 files changed, 95 insertions, 0 deletions
diff --git a/drivers/power/pmic/s5m8767.c b/drivers/power/pmic/s5m8767.c
new file mode 100644
index 0000000..075fe7e
--- /dev/null
+++ b/drivers/power/pmic/s5m8767.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright (C) 2015 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <fdtdec.h>
+#include <errno.h>
+#include <dm.h>
+#include <i2c.h>
+#include <power/pmic.h>
+#include <power/regulator.h>
+#include <power/s5m8767.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static const struct pmic_child_info pmic_children_info[] = {
+ { .prefix = "LDO", .driver = S5M8767_LDO_DRIVER },
+ { .prefix = "BUCK", .driver = S5M8767_BUCK_DRIVER },
+ { },
+};
+
+static int s5m8767_reg_count(struct udevice *dev)
+{
+ return S5M8767_NUM_OF_REGS;
+}
+
+static int s5m8767_write(struct udevice *dev, uint reg, const uint8_t *buff,
+ int len)
+{
+ if (dm_i2c_write(dev, reg, buff, len)) {
+ error("write error to device: %p register: %#x!", dev, reg);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int s5m8767_read(struct udevice *dev, uint reg, uint8_t *buff, int len)
+{
+ if (dm_i2c_read(dev, reg, buff, len)) {
+ error("read error from device: %p register: %#x!", dev, reg);
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int s5m8767_enable_32khz_cp(struct udevice *dev)
+{
+ return pmic_clrsetbits(dev, S5M8767_EN32KHZ_CP, 0, 1 << 1);
+}
+
+static int s5m8767_bind(struct udevice *dev)
+{
+ int node;
+ const void *blob = gd->fdt_blob;
+ int children;
+
+ node = fdt_subnode_offset(blob, dev->of_offset, "regulators");
+ if (node <= 0) {
+ debug("%s: %s regulators subnode not found!", __func__,
+ dev->name);
+ return -ENXIO;
+ }
+
+ debug("%s: '%s' - found regulators subnode\n", __func__, dev->name);
+
+ children = pmic_bind_children(dev, node, pmic_children_info);
+ if (!children)
+ debug("%s: %s - no child found\n", __func__, dev->name);
+
+ /* Always return success for this device */
+ return 0;
+}
+
+static struct dm_pmic_ops s5m8767_ops = {
+ .reg_count = s5m8767_reg_count,
+ .read = s5m8767_read,
+ .write = s5m8767_write,
+};
+
+static const struct udevice_id s5m8767_ids[] = {
+ { .compatible = "samsung,s5m8767-pmic" },
+ { }
+};
+
+U_BOOT_DRIVER(pmic_s5m8767) = {
+ .name = "s5m8767_pmic",
+ .id = UCLASS_PMIC,
+ .of_match = s5m8767_ids,
+ .bind = s5m8767_bind,
+ .ops = &s5m8767_ops,
+};