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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2014-06-20 13:54:52 +0900
committerTom Rini <trini@ti.com>2014-07-07 19:43:01 -0400
commit0657e46e28a3b0cf5fe1219f50a9f99fe7f9e90a (patch)
tree686e33c7655f022ec2bcab7e39aab1730ebef7f1 /drivers/pcmcia/mpc8xx_pcmcia.c
parentdab0f7626edd5469f6949b826e52f74fcb48b090 (diff)
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mpc8xx: remove RPXlite_dw, quantum board support
These boards are old enough and have no maintainers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'drivers/pcmcia/mpc8xx_pcmcia.c')
-rw-r--r--drivers/pcmcia/mpc8xx_pcmcia.c10
1 files changed, 0 insertions, 10 deletions
diff --git a/drivers/pcmcia/mpc8xx_pcmcia.c b/drivers/pcmcia/mpc8xx_pcmcia.c
index 6638277..af77426 100644
--- a/drivers/pcmcia/mpc8xx_pcmcia.c
+++ b/drivers/pcmcia/mpc8xx_pcmcia.c
@@ -211,16 +211,6 @@ static u_int m8xx_get_graycode(u_int size)
#if 0
-#if defined(CONFIG_RPXLITE)
-
-/* The RPX boards seems to have it's bus monitor timeout set to 6*8 clocks.
- * SYPCR is write once only, therefore must the slowest memory be faster
- * than the bus monitor or we will get a machine check due to the bus timeout.
- */
-#undef PCMCIA_BMT_LIMIT
-#define PCMCIA_BMT_LIMIT (6*8)
-#endif
-
static u_int m8xx_get_speed(u_int ns, u_int is_io)
{
u_int reg, clocks, psst, psl, psht;