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authorWolfgang Denk <wd@denx.de>2008-10-18 21:59:44 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:59:44 +0200
commitf82642e33899766892499b163e60560fbbf87773 (patch)
treeab90f076f18e56b2b3e8c9375b95917daa78c1d9 /drivers/pcmcia/marubun_pcmcia.c
parentb59b16ca24bc7e77ec113021a6d77b9b32fcf192 (diff)
parent360fe71e82b83e264c964c9447c537e9a1f643c8 (diff)
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Merge 'next' branch
Conflicts: board/freescale/mpc8536ds/mpc8536ds.c include/configs/mgcoge.h Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'drivers/pcmcia/marubun_pcmcia.c')
-rw-r--r--drivers/pcmcia/marubun_pcmcia.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/pcmcia/marubun_pcmcia.c b/drivers/pcmcia/marubun_pcmcia.c
index d075ba3..f715dec 100644
--- a/drivers/pcmcia/marubun_pcmcia.c
+++ b/drivers/pcmcia/marubun_pcmcia.c
@@ -38,20 +38,20 @@
#if defined(CONFIG_PCMCIA)
/* MR-SHPC-01 register */
-#define MRSHPC_MODE (CFG_MARUBUN_MRSHPC + 4)
-#define MRSHPC_OPTION (CFG_MARUBUN_MRSHPC + 6)
-#define MRSHPC_CSR (CFG_MARUBUN_MRSHPC + 8)
-#define MRSHPC_ISR (CFG_MARUBUN_MRSHPC + 10)
-#define MRSHPC_ICR (CFG_MARUBUN_MRSHPC + 12)
-#define MRSHPC_CPWCR (CFG_MARUBUN_MRSHPC + 14)
-#define MRSHPC_MW0CR1 (CFG_MARUBUN_MRSHPC + 16)
-#define MRSHPC_MW1CR1 (CFG_MARUBUN_MRSHPC + 18)
-#define MRSHPC_IOWCR1 (CFG_MARUBUN_MRSHPC + 20)
-#define MRSHPC_MW0CR2 (CFG_MARUBUN_MRSHPC + 22)
-#define MRSHPC_MW1CR2 (CFG_MARUBUN_MRSHPC + 24)
-#define MRSHPC_IOWCR2 (CFG_MARUBUN_MRSHPC + 26)
-#define MRSHPC_CDCR (CFG_MARUBUN_MRSHPC + 28)
-#define MRSHPC_PCIC_INFO (CFG_MARUBUN_MRSHPC + 30)
+#define MRSHPC_MODE (CONFIG_SYS_MARUBUN_MRSHPC + 4)
+#define MRSHPC_OPTION (CONFIG_SYS_MARUBUN_MRSHPC + 6)
+#define MRSHPC_CSR (CONFIG_SYS_MARUBUN_MRSHPC + 8)
+#define MRSHPC_ISR (CONFIG_SYS_MARUBUN_MRSHPC + 10)
+#define MRSHPC_ICR (CONFIG_SYS_MARUBUN_MRSHPC + 12)
+#define MRSHPC_CPWCR (CONFIG_SYS_MARUBUN_MRSHPC + 14)
+#define MRSHPC_MW0CR1 (CONFIG_SYS_MARUBUN_MRSHPC + 16)
+#define MRSHPC_MW1CR1 (CONFIG_SYS_MARUBUN_MRSHPC + 18)
+#define MRSHPC_IOWCR1 (CONFIG_SYS_MARUBUN_MRSHPC + 20)
+#define MRSHPC_MW0CR2 (CONFIG_SYS_MARUBUN_MRSHPC + 22)
+#define MRSHPC_MW1CR2 (CONFIG_SYS_MARUBUN_MRSHPC + 24)
+#define MRSHPC_IOWCR2 (CONFIG_SYS_MARUBUN_MRSHPC + 26)
+#define MRSHPC_CDCR (CONFIG_SYS_MARUBUN_MRSHPC + 28)
+#define MRSHPC_PCIC_INFO (CONFIG_SYS_MARUBUN_MRSHPC + 30)
int pcmcia_on (void)
{
@@ -98,8 +98,8 @@ int pcmcia_on (void)
outw(0x0000,MRSHPC_ISR);
outw(0x2000,MRSHPC_ICR);
- outb(0x00,(CFG_MARUBUN_MW2 + 0x206));
- outb(0x42,(CFG_MARUBUN_MW2 + 0x200));
+ outb(0x00,(CONFIG_SYS_MARUBUN_MW2 + 0x206));
+ outb(0x42,(CONFIG_SYS_MARUBUN_MW2 + 0x200));
return 0;
}