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author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-10-02 19:05:53 +0200 |
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committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-10-02 19:05:53 +0200 |
commit | b90296fc39a33f84bb2b0aa79bf997be495ba791 (patch) | |
tree | 4ea0d61df25d10fe7552aedf781fd167f4c670fe /drivers/pci_auto.c | |
parent | e80e585b00fbbab7ad1bf71619741f2c5b029ab7 (diff) | |
parent | 527c80f012030fa0b51f8594847ec56c9317e9b1 (diff) | |
download | u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.zip u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.tar.gz u-boot-imx-b90296fc39a33f84bb2b0aa79bf997be495ba791.tar.bz2 |
Merge commit 'origin/master'
Diffstat (limited to 'drivers/pci_auto.c')
-rw-r--r-- | drivers/pci_auto.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c index a3c609b..acfda83 100644 --- a/drivers/pci_auto.c +++ b/drivers/pci_auto.c @@ -28,6 +28,11 @@ #define PCIAUTO_IDE_MODE_MASK 0x05 +/* the user can define CFG_PCI_CACHE_LINE_SIZE to avoid problems */ +#ifndef CFG_PCI_CACHE_LINE_SIZE +#define CFG_PCI_CACHE_LINE_SIZE 8 +#endif + /* * */ @@ -94,7 +99,7 @@ void pciauto_setup_device(struct pci_controller *hose, pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat); cmdstat = (cmdstat & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) | PCI_COMMAND_MASTER; - for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_0 + (bars_num*4); bar += 4) { + for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_0 + (bars_num*4); bar += 4) { /* Tickle the BAR and get the response */ pci_hose_write_config_dword(hose, dev, bar, 0xffffffff); pci_hose_read_config_dword(hose, dev, bar, &bar_response); @@ -150,7 +155,8 @@ void pciauto_setup_device(struct pci_controller *hose, } pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat); - pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08); + pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, + CFG_PCI_CACHE_LINE_SIZE); pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80); } |