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| author | Felix Radensky <felix@embedded-sol.com> | 2010-01-23 01:35:24 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2010-01-23 09:27:18 +0100 |
| commit | 97c9f29008579f56c3fb86785f29f04dd4f47f94 (patch) | |
| tree | b950575d84768d5e6829d2c73fba8bdf99ceeaa7 /drivers/pci | |
| parent | 57ae8a5cced612088104303777e71a3dc89c00ef (diff) | |
| download | u-boot-imx-97c9f29008579f56c3fb86785f29f04dd4f47f94.zip u-boot-imx-97c9f29008579f56c3fb86785f29f04dd4f47f94.tar.gz u-boot-imx-97c9f29008579f56c3fb86785f29f04dd4f47f94.tar.bz2 | |
ppc4xx: Fix sending type 1 PCI transactions
The list of 4xx SoCs that should send type 1 PCI transactions
is not defined correctly. As a result PCI-PCI bridges and devices
behind them are not identified. The following 4xx variants should
send type 1 transactions: 440GX, 440GP, 440SP, 440SPE, 460EX and 460GT.
Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/pci')
| -rw-r--r-- | drivers/pci/pci_indirect.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/pci/pci_indirect.c b/drivers/pci/pci_indirect.c index ab51f8d..2070d01 100644 --- a/drivers/pci/pci_indirect.c +++ b/drivers/pci/pci_indirect.c @@ -59,7 +59,8 @@ indirect_##rw##_config_##size(struct pci_controller *hose, \ cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ return 0; \ } -#elif defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SPE) +#elif defined(CONFIG_440GX) || defined(CONFIG_440GP) || defined(CONFIG_440SP) || \ + defined(CONFIG_440SPE) || defined(CONFIG_460EX) || defined(CONFIG_460GT) #define INDIRECT_PCI_OP(rw, size, type, op, mask) \ static int \ indirect_##rw##_config_##size(struct pci_controller *hose, \ |