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authorWolfgang Denk <wd@pollux.(none)>2005-09-25 18:41:04 +0200
committerWolfgang Denk <wd@pollux.(none)>2005-09-25 18:41:04 +0200
commit49a7581c6ced35379ec3c450bb60fe736db9d733 (patch)
tree7f3d964bd45d09f62122231ac7e26c61b120349f /drivers/omap24xx_i2c.c
parent8e2be51de8dd03c1ce4d06cbb18ad06133d47cd5 (diff)
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OMAP242x H4 board update
- fix for ES2 differences. - switch to using the cfi_flash driver. - fix SRAM build address. - fix for GP device operation. - unlock SRAM for GP devices. - display more device information. - fix potential deadlock in omap24xx_i2c driver. - fix DLL load values to match dpllout*1 operation. - fix 2nd chip select init for combo DDR device. - add support for CFI Intel 28F256L18 on H4 board. Patch by Richard Woodruff, 03 Mar 2005
Diffstat (limited to 'drivers/omap24xx_i2c.c')
-rw-r--r--drivers/omap24xx_i2c.c17
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/omap24xx_i2c.c b/drivers/omap24xx_i2c.c
index 383dfcb..7dab786 100644
--- a/drivers/omap24xx_i2c.c
+++ b/drivers/omap24xx_i2c.c
@@ -32,12 +32,16 @@
static void wait_for_bb (void);
static u16 wait_for_pin (void);
-void flush_fifo(void);
+static void flush_fifo(void);
void i2c_init (int speed, int slaveadd)
{
u16 scl;
+ outw(0x2, I2C_SYSC); /* for ES2 after soft reset */
+ udelay(1000);
+ outw(0x0, I2C_SYSC); /* will probably self clear but */
+
if (inw (I2C_CON) & I2C_CON_EN) {
outw (0, I2C_CON);
udelay (50000);
@@ -52,11 +56,14 @@ void i2c_init (int speed, int slaveadd)
/* own address */
outw (slaveadd, I2C_OA);
outw (I2C_CON_EN, I2C_CON);
- outw (0, I2C_CNT);
+
/* have to enable intrrupts or OMAP i2c module doesn't work */
outw (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE);
udelay (1000);
+ flush_fifo();
+ outw (0xFFFF, I2C_STAT);
+ outw (0, I2C_CNT);
}
static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
@@ -160,11 +167,15 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value)
}
if (!i2c_error) {
+ int eout = 200;
+
outw (I2C_CON_EN, I2C_CON);
while ((stat = inw (I2C_STAT)) || (inw (I2C_CON) & I2C_CON_MST)) {
udelay (1000);
/* have to read to clear intrrupt */
outw (0xFFFF, I2C_STAT);
+ if(--eout == 0) /* better leave with error than hang */
+ break;
}
}
flush_fifo();
@@ -173,7 +184,7 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value)
return i2c_error;
}
-void flush_fifo(void)
+static void flush_fifo(void)
{ u16 stat;
/* note: if you try and read data when its not there or ready