diff options
| author | Liu Hui-R64343 <r64343@freescale.com> | 2011-01-03 22:27:36 +0000 |
|---|---|---|
| committer | Albert Aribaud <albert.aribaud@free.fr> | 2011-02-02 00:54:41 +0100 |
| commit | 96912453fe9707d84874da56cef94d715adc6e29 (patch) | |
| tree | b44cecab6586a3f694ac56ac1660dd93fe717a68 /drivers/net | |
| parent | 595f3e56459797d70e842bce93d0dd01455a329f (diff) | |
| download | u-boot-imx-96912453fe9707d84874da56cef94d715adc6e29.zip u-boot-imx-96912453fe9707d84874da56cef94d715adc6e29.tar.gz u-boot-imx-96912453fe9707d84874da56cef94d715adc6e29.tar.bz2 | |
fec_mxc: add support for MX53 processor
This patch add FEC support for Freescale MX53 processor
Signed-off-by: Jason Liu <r64343@freescale.com>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/fec_mxc.c | 2 | ||||
| -rw-r--r-- | drivers/net/fec_mxc.h | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index c438962..4e4cd27 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -354,7 +354,7 @@ static int fec_open(struct eth_device *edev) */ writel(readl(&fec->eth->ecntrl) | FEC_ECNTRL_ETHER_EN, &fec->eth->ecntrl); -#ifdef CONFIG_MX25 +#if defined(CONFIG_MX25) || defined(CONFIG_MX53) udelay(100); /* * setup the MII gasket for RMII mode diff --git a/drivers/net/fec_mxc.h b/drivers/net/fec_mxc.h index 5d0d69d..1ba5161 100644 --- a/drivers/net/fec_mxc.h +++ b/drivers/net/fec_mxc.h @@ -147,7 +147,7 @@ struct ethernet_regs { uint32_t res14[7]; /* MBAR_ETH + 0x2E4-2FC */ -#ifdef CONFIG_MX25 +#if defined(CONFIG_MX25) || defined(CONFIG_MX53) uint16_t miigsk_cfgr; /* MBAR_ETH + 0x300 */ uint16_t res15[3]; /* MBAR_ETH + 0x302-306 */ uint16_t miigsk_enr; /* MBAR_ETH + 0x308 */ @@ -204,7 +204,7 @@ struct ethernet_regs { #define FEC_ECNTRL_RESET 0x00000001 /* reset the FEC */ #define FEC_ECNTRL_ETHER_EN 0x00000002 /* enable the FEC */ -#ifdef CONFIG_MX25 +#if defined(CONFIG_MX25) || defined(CONFIG_MX53) /* defines for MIIGSK */ /* RMII frequency control: 0=50MHz, 1=5MHz */ #define MIIGSK_CFGR_FRCONT (1 << 6) |