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author | Claudiu Manoil <claudiu.manoil@freescale.com> | 2013-09-30 12:44:47 +0300 |
---|---|---|
committer | Joe Hershberger <joe.hershberger@ni.com> | 2013-11-22 17:03:17 -0600 |
commit | b1690bc39cfdba82be34b1a98abc319339070698 (patch) | |
tree | bd6849caa41158fc16594377a60578adc44c0dea /drivers/net | |
parent | 82ef75ca5c69c7d053c07f509a901d2ad2e29570 (diff) | |
download | u-boot-imx-b1690bc39cfdba82be34b1a98abc319339070698.zip u-boot-imx-b1690bc39cfdba82be34b1a98abc319339070698.tar.gz u-boot-imx-b1690bc39cfdba82be34b1a98abc319339070698.tar.bz2 |
net: tsec: Fix mac addr setup portability, cleanup
Fix the 32-bit memory access that is not "endianess safe",
i.e. not giving the desired byte layout for LE cpus:
tempval = *((uint *) (tmpbuf + 4)), where 'char tmpbuf[]'.
Free the stack from rendundant local vars:
tmpbuf[] and i.
Use a portable type (u32) for the 32bit tsec register value
holder: tempval.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/tsec.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 082cdec..e9138f0 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -473,11 +473,9 @@ static void tsec_halt(struct eth_device *dev) */ static int tsec_init(struct eth_device *dev, bd_t * bd) { - uint tempval; - char tmpbuf[MAC_ADDR_LEN]; - int i; struct tsec_private *priv = (struct tsec_private *)dev->priv; struct tsec __iomem *regs = priv->regs; + u32 tempval; int ret; /* Make sure the controller is stopped */ @@ -490,16 +488,16 @@ static int tsec_init(struct eth_device *dev, bd_t * bd) out_be32(®s->ecntrl, ECNTRL_INIT_SETTINGS); /* Copy the station address into the address registers. - * Backwards, because little endian MACS are dumb */ - for (i = 0; i < MAC_ADDR_LEN; i++) - tmpbuf[MAC_ADDR_LEN - 1 - i] = dev->enetaddr[i]; - - tempval = (tmpbuf[0] << 24) | (tmpbuf[1] << 16) | (tmpbuf[2] << 8) | - tmpbuf[3]; + * For a station address of 0x12345678ABCD in transmission + * order (BE), MACnADDR1 is set to 0xCDAB7856 and + * MACnADDR2 is set to 0x34120000. + */ + tempval = (dev->enetaddr[5] << 24) | (dev->enetaddr[4] << 16) | + (dev->enetaddr[3] << 8) | dev->enetaddr[2]; out_be32(®s->macstnaddr1, tempval); - tempval = *((uint *) (tmpbuf + 4)); + tempval = (dev->enetaddr[1] << 24) | (dev->enetaddr[0] << 16); out_be32(®s->macstnaddr2, tempval); |