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authorAlexey Brodkin <Alexey.Brodkin@synopsys.com>2013-09-25 17:33:10 +0400
committerJoe Hershberger <joe.hershberger@ni.com>2013-11-22 16:50:54 -0600
commit227ad7b2b6fab024fff6f60613b0e90c9e3a6724 (patch)
tree86c2c10f745412488692ac3acee33940d6d8fa27 /drivers/net
parent47ce8890486be72ce6b634c590a0c6baa2447084 (diff)
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net: designware: Respect "bus mode" register contents on SW reset
"bus mode" register contains lots of fields and some of them don't expect to be written with 0 (zero). So since we're only interested in resetting MAC (which is done with setting the least significant bit of this register with "0") I believe it's better to modify only 1 bit of the register. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Vipin Kumar <vipin.kumar@st.com> Patch: 277864
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/designware.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/designware.c b/drivers/net/designware.c
index 8413d57..22155b4 100644
--- a/drivers/net/designware.c
+++ b/drivers/net/designware.c
@@ -96,7 +96,7 @@ static int mac_reset(struct eth_device *dev)
ulong start;
int timeout = CONFIG_MACRESET_TIMEOUT;
- writel(DMAMAC_SRST, &dma_p->busmode);
+ writel(readl(&dma_p->busmode) | DMAMAC_SRST, &dma_p->busmode);
if (priv->interface != PHY_INTERFACE_MODE_RGMII)
writel(MII_PORTSELECT, &mac_p->conf);