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authorWolfgang Denk <wd@denx.de>2010-12-16 23:00:53 +0100
committerWolfgang Denk <wd@denx.de>2010-12-16 23:00:53 +0100
commit006915fbb0e3c1c9927fe32c4e92cb011f8499e7 (patch)
treeb477df920f7d638a0472aa1d6bfa5ff71243448c /drivers/net
parent98e69567022eb2138dd99554b3a2e80522a1b153 (diff)
parentb5d58d8500bfb918c7fec56f241e6ee1078c2be0 (diff)
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Merge branch 'master' of ../master into next
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/fec_mxc.c17
-rw-r--r--drivers/net/tsec.c9
2 files changed, 6 insertions, 20 deletions
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index c17f937..0d0f392 100644
--- a/drivers/net/fec_mxc.c
+++ b/drivers/net/fec_mxc.c
@@ -312,21 +312,8 @@ static void fec_rbd_clean(int last, struct fec_bd *pRbd)
static int fec_get_hwaddr(struct eth_device *dev, unsigned char *mac)
{
-/*
- * The MX27 can store the mac address in internal eeprom
- * This mechanism is not supported now by MX51 or MX25
- */
-#if defined(CONFIG_MX51) || defined(CONFIG_MX25)
- return -1;
-#else
- struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE;
- int i;
-
- for (i = 0; i < 6; i++)
- mac[6-1-i] = readl(&iim->iim_bank_area0[IIM0_MAC + i]);
-
+ imx_get_mac_from_fuse(mac);
return !is_valid_ether_addr(mac);
-#endif
}
static int fec_set_hwaddr(struct eth_device *dev)
@@ -754,7 +741,7 @@ static int fec_probe(bd_t *bd)
eth_register(edev);
if (fec_get_hwaddr(edev, ethaddr) == 0) {
- printf("got MAC address from EEPROM: %pM\n", ethaddr);
+ printf("got MAC address from fuse: %pM\n", ethaddr);
memcpy(edev->enetaddr, ethaddr, 6);
}
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 9b5dd92..77908d1 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -5,7 +5,7 @@
* terms of the GNU Public License, Version 2, incorporated
* herein by reference.
*
- * Copyright 2004-2009 Freescale Semiconductor, Inc.
+ * Copyright 2004-2010 Freescale Semiconductor, Inc.
* (C) Copyright 2003, Motorola, Inc.
* author Andy Fleming
*
@@ -292,13 +292,12 @@ static uint tsec_local_mdio_read(volatile tsec_mdio_t *phyregs,
/* By default force the TBI PHY into 1000Mbps full duplex when in SGMII mode */
#ifndef CONFIG_TSEC_TBICR_SETTINGS
-#define TBICR_SETTINGS ( \
+#define CONFIG_TSEC_TBICR_SETTINGS ( \
TBICR_PHY_RESET \
+ | TBICR_ANEG_ENABLE \
| TBICR_FULL_DUPLEX \
| TBICR_SPEED1_SET \
)
-#else
-#define TBICR_SETTINGS CONFIG_TSEC_TBICR_SETTINGS
#endif /* CONFIG_TSEC_TBICR_SETTINGS */
/* Configure the TBI for SGMII operation */
@@ -311,7 +310,7 @@ static void tsec_configure_serdes(struct tsec_private *priv)
tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_TBICON,
TBICON_CLK_SELECT);
tsec_local_mdio_write(priv->phyregs_sgmii, priv->regs->tbipa, TBI_CR,
- TBICR_SETTINGS);
+ CONFIG_TSEC_TBICR_SETTINGS);
}
/* Discover which PHY is attached to the device, and configure it