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authorClaudiu Manoil <claudiu.manoil@freescale.com>2015-08-12 13:29:14 +0300
committerYork Sun <yorksun@freescale.com>2015-09-01 21:39:03 -0500
commitebe4c1e6469444753bd2ba93fe63e6183cf2905c (patch)
treecec6f84bbbdf284f6abceb121663b07b2f4b2a61 /drivers/net/tsec.c
parentda2919b4a904411c374a6e0d9dc771e180968266 (diff)
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ls102xa: etsec: Use proper settings for BE BDs
Replace the DMACTRL[LE] hack with recommended settings for ETSECDMAMCR to get the same end effect - obtaining big-endian buffer descriptors and frame data for eTSEC. The reset / default value for ETSECDMAMCR is preserved, excepting the BD and FR bits which are cleared to enable the BE mode in accordance with the H/W specifications. Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA" Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Acked-by: Alison Wang <alison.wang@freescale.com> Tested-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/net/tsec.c')
-rw-r--r--drivers/net/tsec.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index 42d0374..4bdc188 100644
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -271,9 +271,6 @@ void redundant_init(struct eth_device *dev)
out_be32(&regs->tstat, TSTAT_CLEAR_THALT);
out_be32(&regs->rstat, RSTAT_CLEAR_RHALT);
clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
-#ifdef CONFIG_LS102XA
- setbits_be32(&regs->dmactrl, DMACTRL_LE);
-#endif
do {
uint16_t status;
@@ -370,9 +367,6 @@ static void startup_tsec(struct eth_device *dev)
out_be32(&regs->tstat, TSTAT_CLEAR_THALT);
out_be32(&regs->rstat, RSTAT_CLEAR_RHALT);
clrbits_be32(&regs->dmactrl, DMACTRL_GRS | DMACTRL_GTS);
-#ifdef CONFIG_LS102XA
- setbits_be32(&regs->dmactrl, DMACTRL_LE);
-#endif
}
/* This returns the status bits of the device. The return value