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| author | Anatolij Gustschin <agust@denx.de> | 2008-12-02 10:31:04 +0100 |
|---|---|---|
| committer | Ben Warren <biggerbadderben@gmail.com> | 2008-12-04 22:51:54 -0800 |
| commit | 23afaba65ec5206757e589ef334a8b38168c045f (patch) | |
| tree | 3c16f0e84b9cdcccac14644f05cdff7f9a150ba3 /drivers/net/tsec.c | |
| parent | 2e4970d8109d690adcf615d9e3cac7b5b2e8eaed (diff) | |
| download | u-boot-imx-23afaba65ec5206757e589ef334a8b38168c045f.zip u-boot-imx-23afaba65ec5206757e589ef334a8b38168c045f.tar.gz u-boot-imx-23afaba65ec5206757e589ef334a8b38168c045f.tar.bz2 | |
net: tsec: Fix Marvell 88E1121R phy init
This patch tries to ensure that phy interrupt pin
won't be asserted after booting. We experienced
following issues with current 88E1121R phy init:
Marvell 88E1121R phy can be hardware-configured
to share MDC/MDIO and interrupt pins for both ports
P0 and P1 (e.g. as configured on socrates board).
Port 0 interrupt pin will be shared by both ports
in such configuration. After booting Linux and
configuring eth0 interface, port 0 phy interrupts
are enabled. After rebooting without proper eth0
interface shutdown port 0 phy interrupts remain
enabled so any change on port 0 (link status, etc.)
cause assertion of the interrupt. Now booting Linux
and configuring eth1 interface will cause permanent
phy interrupt storm as the registered phy 1 interrupt
handler doesn't acknowledge phy 0 interrupts. This
of course should be fixed in Linux driver too.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'drivers/net/tsec.c')
| -rw-r--r-- | drivers/net/tsec.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index d7da081..fbc9a6d 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -1196,6 +1196,9 @@ struct phy_info phy_info_M88E1121R = { {MIIM_88E1121_PHY_LED_CTRL, miim_read, &mii_88E1121_set_led}, {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init}, + /* Disable IRQs and de-assert interrupt */ + {MIIM_88E1121_PHY_IRQ_EN, 0, NULL}, + {MIIM_88E1121_PHY_IRQ_STATUS, miim_read, NULL}, {miim_end,} }, (struct phy_cmd[]){ /* startup */ |