diff options
| author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2012-06-26 16:38:02 +0000 |
|---|---|---|
| committer | Joe Hershberger <joe.hershberger@ni.com> | 2012-07-23 22:00:43 -0500 |
| commit | 58bef2a5e3833895559a963d6b0c12a73767b2dd (patch) | |
| tree | 07fc6f26d610bc26e6afd0d13cf1aae026983bd1 /drivers/net/sh_eth.h | |
| parent | f41471e6a36e70e53bf4cbe4247ff4c0ba87e56f (diff) | |
| download | u-boot-imx-58bef2a5e3833895559a963d6b0c12a73767b2dd.zip u-boot-imx-58bef2a5e3833895559a963d6b0c12a73767b2dd.tar.gz u-boot-imx-58bef2a5e3833895559a963d6b0c12a73767b2dd.tar.bz2 | |
net: sh_eth: clean up for the SH7757's code
The SH7757's ETHER can work using the SH7724's setting. So, the patch
modifies it.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Diffstat (limited to 'drivers/net/sh_eth.h')
| -rw-r--r-- | drivers/net/sh_eth.h | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 50f4b69..5276be3 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -319,7 +319,7 @@ enum EESR_BIT { EESR_FTC = 0x00200000, EESR_TDE = 0x00100000, EESR_TFE = 0x00080000, EESR_FRC = 0x00040000, EESR_RDE = 0x00020000, EESR_RFE = 0x00010000, -#if defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757) +#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) EESR_CND = 0x00000800, #endif EESR_DLC = 0x00000400, @@ -426,9 +426,7 @@ enum FELIC_MODE_BIT { #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) #define ECMR_CHG_DM (ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | ECMR_RXF | \ ECMR_TXF | ECMR_MCT) -#elif CONFIG_CPU_SH7757 -#define ECMR_CHG_DM (ECMR_ZPF) -#elif CONFIG_CPU_SH7724 +#elif CONFIG_CPU_SH7724 || CONFIG_CPU_SH7757 #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF) #else #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT) @@ -473,20 +471,12 @@ enum ECSIPR_STATUS_MASK_BIT { /* APR */ enum APR_BIT { -#ifdef CONFIG_CPU_SH7757 - APR_AP = 0x00000001, -#else APR_AP = 0x00000004, -#endif }; /* MPR */ enum MPR_BIT { -#ifdef CONFIG_CPU_SH7757 - MPR_MP = 0x00000001, -#else MPR_MP = 0x00000006, -#endif }; /* TRSCER */ |