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author | Stefan Roese <sr@denx.de> | 2010-07-21 19:06:10 +0200 |
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committer | Stefan Roese <sr@denx.de> | 2010-07-23 09:54:54 +0200 |
commit | 58eb869ffc45856658648e24a88d47fdd3768b53 (patch) | |
tree | a3a32d1ae66a0b62b801c64587af570f87676efd /drivers/net/rtl8019.h | |
parent | b995d7cb2c1e47305cd7feb2513ed37d30f8edd3 (diff) | |
download | u-boot-imx-58eb869ffc45856658648e24a88d47fdd3768b53.zip u-boot-imx-58eb869ffc45856658648e24a88d47fdd3768b53.tar.gz u-boot-imx-58eb869ffc45856658648e24a88d47fdd3768b53.tar.bz2 |
ppc4xx: Add "ecctest" command to test/simulate ECC errors
This patch adds the "ecctest" command to test and simulate ECC errors
(single bit and/or double bit) while running from SDRAM. Currently only
the IBM DDR2 controller is supported (405EX, 440SP(e), 460EX/GT).
This is done by copying and calling functions, modifying the SDRAM
controller operation mode, in internal SRAM/OCM.
For correctable ECC errors (single bit) only the status will be printed
since the DDR2 controller doesn't provide the faulting address:
=> ecctest 1000000 1
Using address 01000000 for 1 bit ECC error injection
ECC: Correctable error
Uncorrectable ECC errors (double bit) will also display the faulting
address:
=> ecctest 1000000 2
Using address 01000000 for 2 bit ECC error injection
ECC: Uncorrectable error at 0x0001000000
To enable this "ecctest" function you need to define CONFIG_CMD_ECCTEST
in the board config header.
Tested on katmai and t3corp.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'drivers/net/rtl8019.h')
0 files changed, 0 insertions, 0 deletions