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author | York Sun <yorksun@freescale.com> | 2014-11-07 12:14:36 -0800 |
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committer | York Sun <yorksun@freescale.com> | 2014-12-05 08:06:11 -0800 |
commit | 84baed2a2bdde3b2bf876d36cc966bd41ac67a6d (patch) | |
tree | 933eef7757ee30f9d68dd933c0d6d40965fb7e41 /drivers/net/phy | |
parent | 9a7eeb9c9fe17d39a68e8775f9cf0a1c1b81b810 (diff) | |
download | u-boot-imx-84baed2a2bdde3b2bf876d36cc966bd41ac67a6d.zip u-boot-imx-84baed2a2bdde3b2bf876d36cc966bd41ac67a6d.tar.gz u-boot-imx-84baed2a2bdde3b2bf876d36cc966bd41ac67a6d.tar.bz2 |
driver/ddr/fsl: Adjust timing_cfg_0 to better support two DDR slots
Increase write-to-write and read-to-read turnaround time for two-slot DDR
configurations. Previously only quad-rank and two dual-rank configurations
have this additional turnaround time. A recent test on two single-rank
DIMMs shows the shorter additional turnaround time is also needed.
Signed-off-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/net/phy')
0 files changed, 0 insertions, 0 deletions