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| author | Tom Rini <trini@ti.com> | 2014-05-30 11:34:39 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-05-30 11:34:39 -0400 |
| commit | 90b51c33f362926e17d4c07dcef1ce822abaa89f (patch) | |
| tree | 9eb339bb2b864bfac2434d0cd808301506e9bb82 /drivers/net/designware.h | |
| parent | 95856248ca93b9048d87264fbef67ca382975650 (diff) | |
| parent | 9637a1bb896efe392a58dd2772e2c3fcb646409d (diff) | |
| download | u-boot-imx-90b51c33f362926e17d4c07dcef1ce822abaa89f.zip u-boot-imx-90b51c33f362926e17d4c07dcef1ce822abaa89f.tar.gz u-boot-imx-90b51c33f362926e17d4c07dcef1ce822abaa89f.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'drivers/net/designware.h')
| -rw-r--r-- | drivers/net/designware.h | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/drivers/net/designware.h b/drivers/net/designware.h index 382b0c7..ce51102 100644 --- a/drivers/net/designware.h +++ b/drivers/net/designware.h @@ -77,18 +77,18 @@ struct eth_dma_regs { #define DW_DMA_BASE_OFFSET (0x1000) +/* Default DMA Burst length */ +#ifndef CONFIG_DW_GMAC_DEFAULT_DMA_PBL +#define CONFIG_DW_GMAC_DEFAULT_DMA_PBL 8 +#endif + /* Bus mode register definitions */ #define FIXEDBURST (1 << 16) #define PRIORXTX_41 (3 << 14) #define PRIORXTX_31 (2 << 14) #define PRIORXTX_21 (1 << 14) #define PRIORXTX_11 (0 << 14) -#define BURST_1 (1 << 8) -#define BURST_2 (2 << 8) -#define BURST_4 (4 << 8) -#define BURST_8 (8 << 8) -#define BURST_16 (16 << 8) -#define BURST_32 (32 << 8) +#define DMA_PBL (CONFIG_DW_GMAC_DEFAULT_DMA_PBL<<8) #define RXHIGHPRIO (1 << 1) #define DMAMAC_SRST (1 << 0) @@ -215,15 +215,14 @@ struct dmamacdescr { #endif struct dw_eth_dev { - u32 interface; - u32 tx_currdescnum; - u32 rx_currdescnum; - struct dmamacdescr tx_mac_descrtable[CONFIG_TX_DESCR_NUM]; struct dmamacdescr rx_mac_descrtable[CONFIG_RX_DESCR_NUM]; + char txbuffs[TX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN); + char rxbuffs[RX_TOTAL_BUFSIZE] __aligned(ARCH_DMA_MINALIGN); - char txbuffs[TX_TOTAL_BUFSIZE]; - char rxbuffs[RX_TOTAL_BUFSIZE]; + u32 interface; + u32 tx_currdescnum; + u32 rx_currdescnum; struct eth_mac_regs *mac_regs_p; struct eth_dma_regs *dma_regs_p; |