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authorBartlomiej Sieka <tur@semihalf.com>2006-03-05 18:57:33 +0100
committerBartlomiej Sieka <tur@semihalf.com>2006-03-05 18:57:33 +0100
commitaddb2e1650fdf872334478393f482dfdce965a61 (patch)
treec16d3de22d1e1040d3f8e6ecfaed20bf2f2c5ea6 /drivers/nand/nand_base.c
parent038ccac511214b062c56f22b9413f784b86bcd87 (diff)
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Re-factoring the legacy NAND code (legacy NAND now only in board-specific
code and in SoC code). Boards using the old way have CFG_NAND_LEGACY and BOARDLIBS = drivers/nand_legacy/libnand_legacy.a added. Build breakage for NETTA.ERR and NETTA_ISDN - will go away when the new NAND support is implemented for these boards.
Diffstat (limited to 'drivers/nand/nand_base.c')
-rw-r--r--drivers/nand/nand_base.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/nand/nand_base.c b/drivers/nand/nand_base.c
index b039c3c..b2cd62e 100644
--- a/drivers/nand/nand_base.c
+++ b/drivers/nand/nand_base.c
@@ -71,7 +71,10 @@
#endif
#include <common.h>
-#ifdef CONFIG_NEW_NAND_CODE
+
+#ifdef CFG_NAND_LEGACY
+#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support!
+#endif
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
@@ -864,10 +867,10 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
break;
}
}
-
- /* XXX nand device 1 on dave (PPChameleonEVB) needs more time */
+#ifdef PPCHAMELON_NAND_TIMER_HACK
reset_timer();
while (get_timer(0) < 10);
+#endif /* PPCHAMELON_NAND_TIMER_HACK */
return this->read_byte(mtd);
}
@@ -2660,5 +2663,3 @@ void nand_release (struct mtd_info *mtd)
}
#endif
-#endif /* CONFIG_NEW_NAND_CODE */
-