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| author | Tom Rini <trini@ti.com> | 2014-04-25 14:53:51 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2014-04-25 14:53:51 -0400 |
| commit | 080d897585428d0fd42c237abfb6746908f4effc (patch) | |
| tree | dc65d6d4bbbf1a7f06bbb045a981270a7624ec67 /drivers/mtd | |
| parent | adcdeacc3eda1e5949e54062aa99c299e12483be (diff) | |
| parent | 08ad9b068afb8842df4cd559c327f54a42811a8d (diff) | |
| download | u-boot-imx-080d897585428d0fd42c237abfb6746908f4effc.zip u-boot-imx-080d897585428d0fd42c237abfb6746908f4effc.tar.gz u-boot-imx-080d897585428d0fd42c237abfb6746908f4effc.tar.bz2 | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/fsl_ifc_spl.c | 13 | ||||
| -rw-r--r-- | drivers/mtd/spi/fsl_espi_spl.c | 29 |
2 files changed, 26 insertions, 16 deletions
diff --git a/drivers/mtd/nand/fsl_ifc_spl.c b/drivers/mtd/nand/fsl_ifc_spl.c index 2f82f7c..5100772 100644 --- a/drivers/mtd/nand/fsl_ifc_spl.c +++ b/drivers/mtd/nand/fsl_ifc_spl.c @@ -88,11 +88,7 @@ static inline int bad_block(uchar *marker, int port_size) return __raw_readw((u16 *)marker) != 0xffff; } -#ifdef CONFIG_TPL_BUILD int nand_spl_load_image(uint32_t offs, unsigned int uboot_size, void *vdst) -#else -static int nand_load(uint32_t offs, unsigned int uboot_size, void *vdst) -#endif { struct fsl_ifc *ifc = IFC_BASE_ADDR; uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE; @@ -218,15 +214,6 @@ static int nand_load(uint32_t offs, unsigned int uboot_size, void *vdst) } /* - * Defines a static function nand_load_image() here, because non-static makes - * the code too large for certain SPLs(minimal SPL, maximum size <= 4Kbytes) - */ -#ifndef CONFIG_TPL_BUILD -#define nand_spl_load_image(offs, uboot_size, vdst) \ - nand_load(offs, uboot_size, vdst) -#endif - -/* * Main entrypoint for NAND Boot. It's necessary that SDRAM is already * configured and available since this code loads the main U-boot image * from NAND into SDRAM and starts from there. diff --git a/drivers/mtd/spi/fsl_espi_spl.c b/drivers/mtd/spi/fsl_espi_spl.c index e5ac79b..b915469 100644 --- a/drivers/mtd/spi/fsl_espi_spl.c +++ b/drivers/mtd/spi/fsl_espi_spl.c @@ -12,6 +12,20 @@ #define ESPI_BOOT_IMAGE_ADDR 0x50 #define CONFIG_CFG_DATA_SECTOR 0 +void spi_spl_load_image(uint32_t offs, unsigned int size, void *vdst) +{ + struct spi_flash *flash; + + flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, + CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE); + if (flash == NULL) { + puts("\nspi_flash_probe failed"); + hang(); + } + + spi_flash_read(flash, offs, size, vdst); +} + /* * The main entry for SPI booting. It's necessary that SDRAM is already * configured and available since this code loads the main U-Boot image @@ -20,8 +34,10 @@ void spi_boot(void) { void (*uboot)(void) __noreturn; - u32 offset, code_len; + u32 offset, code_len, copy_len = 0; +#ifndef CONFIG_FSL_CORENET unsigned char *buf = NULL; +#endif struct spi_flash *flash; flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS, @@ -56,8 +72,15 @@ void spi_boot(void) code_len = code_len - CONFIG_SPL_MAX_SIZE; #endif /* copy code to DDR */ - spi_flash_read(flash, offset, code_len, - (void *)CONFIG_SYS_SPI_FLASH_U_BOOT_DST); + printf("Loading second stage boot loader "); + while (copy_len <= code_len) { + spi_flash_read(flash, offset + copy_len, 0x2000, + (void *)(CONFIG_SYS_SPI_FLASH_U_BOOT_DST + + copy_len)); + copy_len = copy_len + 0x2000; + putc('.'); + } + /* * Jump to U-Boot image */ |