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| author | Prabhakar Kushwaha <prabhakar@freescale.com> | 2014-06-12 09:13:08 +0530 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-07-22 16:25:54 -0700 |
| commit | 3bab3d8324874604501ff9154e68732fb986057a (patch) | |
| tree | e823b8dc2721187d6b1c82357a252103849db27a /drivers/mtd | |
| parent | d0bc51407cb1a10bdc0025fb58524c6d13658b83 (diff) | |
| download | u-boot-imx-3bab3d8324874604501ff9154e68732fb986057a.zip u-boot-imx-3bab3d8324874604501ff9154e68732fb986057a.tar.gz u-boot-imx-3bab3d8324874604501ff9154e68732fb986057a.tar.bz2 | |
driver/nand:Define MAX_BANKS same as SoC defined for IFC
The number of chip select used by IFC controller vary from one SoC to other.
For eg. P1010 has 4, T4240 has 8.
Update MAX_BANKS same as SoC defined
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'drivers/mtd')
| -rw-r--r-- | drivers/mtd/nand/fsl_ifc_nand.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c index be5a16a..27f5177 100644 --- a/drivers/mtd/nand/fsl_ifc_nand.c +++ b/drivers/mtd/nand/fsl_ifc_nand.c @@ -19,8 +19,12 @@ #include <asm/errno.h> #include <fsl_ifc.h> +#ifndef CONFIG_SYS_FSL_IFC_BANK_COUNT +#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4 +#endif + #define FSL_IFC_V1_1_0 0x01010000 -#define MAX_BANKS 4 +#define MAX_BANKS CONFIG_SYS_FSL_IFC_BANK_COUNT #define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */ #define IFC_TIMEOUT_MSECS 10 /* Maximum number of mSecs to wait for IFC |