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author | Jagan Teki <jteki@openedev.com> | 2015-09-02 11:39:50 +0530 |
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committer | Jagan Teki <jteki@openedev.com> | 2015-10-25 20:17:03 +0530 |
commit | 4efad20a175119f1a82b58d3197df4c20ae85934 (patch) | |
tree | ef02e7aeb7fc8243664e5110121bdd619cb63632 /drivers/mtd/spi | |
parent | 1fabefddfce1bc79a3d704501efdaa053442b8c1 (diff) | |
download | u-boot-imx-4efad20a175119f1a82b58d3197df4c20ae85934.zip u-boot-imx-4efad20a175119f1a82b58d3197df4c20ae85934.tar.gz u-boot-imx-4efad20a175119f1a82b58d3197df4c20ae85934.tar.bz2 |
sf: Update status reg check in spi_flash_cmd_wait_ready
Current flash wait_ready logic is not modular to add new
register status check, hence updated the status check for
adding few more register checks in future.
Below are the sf speed runs with 'sf update' on whole flash, 16MiB.
=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 59.564s, speed 289262 B/s
=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 62.549s, speed 275036 B/s
=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 61.276s, speed 284359 B/s
Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'drivers/mtd/spi')
-rw-r--r-- | drivers/mtd/spi/sf_ops.c | 71 |
1 files changed, 13 insertions, 58 deletions
diff --git a/drivers/mtd/spi/sf_ops.c b/drivers/mtd/spi/sf_ops.c index 6e457ec..c820d48 100644 --- a/drivers/mtd/spi/sf_ops.c +++ b/drivers/mtd/spi/sf_ops.c @@ -139,72 +139,27 @@ static void spi_flash_dual_flash(struct spi_flash *flash, u32 *addr) } #endif -static int spi_flash_poll_status(struct spi_slave *spi, unsigned long timeout, - u8 cmd, u8 poll_bit) -{ - unsigned long timebase; - unsigned long flags = SPI_XFER_BEGIN; - int ret; - u8 status; - u8 check_status = 0x0; - - if (cmd == CMD_FLAG_STATUS) - check_status = poll_bit; - -#ifdef CONFIG_SF_DUAL_FLASH - if (spi->flags & SPI_XFER_U_PAGE) - flags |= SPI_XFER_U_PAGE; -#endif - ret = spi_xfer(spi, 8, &cmd, NULL, flags); - if (ret) { - debug("SF: fail to read %s status register\n", - cmd == CMD_READ_STATUS ? "read" : "flag"); - return ret; - } - - timebase = get_timer(0); - do { - WATCHDOG_RESET(); - - ret = spi_xfer(spi, 8, NULL, &status, 0); - if (ret) - return -1; - - if ((status & poll_bit) == check_status) - break; - - } while (get_timer(timebase) < timeout); - - spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); - - if ((status & poll_bit) == check_status) - return 0; - - /* Timed out */ - debug("SF: time out!\n"); - return -1; -} - int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) { - struct spi_slave *spi = flash->spi; - int ret; - u8 poll_bit = STATUS_WIP; - u8 cmd = CMD_READ_STATUS; + u8 sr; + int timebase, ret; - ret = spi_flash_poll_status(spi, timeout, cmd, poll_bit); - if (ret < 0) - return ret; + timebase = get_timer(0); - if (flash->poll_cmd == CMD_FLAG_STATUS) { - poll_bit = STATUS_PEC; - cmd = CMD_FLAG_STATUS; - ret = spi_flash_poll_status(spi, timeout, cmd, poll_bit); + while (get_timer(timebase) < timeout) { + ret = spi_flash_cmd_read_status(flash, &sr); if (ret < 0) return ret; + + if (!(sr & STATUS_WIP)) + return 0; + else + break; } - return 0; + printf("SF: Timeout!\n"); + + return -ETIMEDOUT; } int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, |