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| author | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2013-06-19 15:37:09 +0530 |
|---|---|---|
| committer | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2013-06-23 22:02:50 +0530 |
| commit | e612ddf5939ba257f2933c7539ee39a3f760e8ce (patch) | |
| tree | aa9a7fa125a05f0ded8ca452ff452b27531b2aef /drivers/mtd/spi/spi_flash_internal.h | |
| parent | cf6b11dcda2f13d1c05c2f20e2a1735a833a41fe (diff) | |
| download | u-boot-imx-e612ddf5939ba257f2933c7539ee39a3f760e8ce.zip u-boot-imx-e612ddf5939ba257f2933c7539ee39a3f760e8ce.tar.gz u-boot-imx-e612ddf5939ba257f2933c7539ee39a3f760e8ce.tar.bz2 | |
sf: Read flash bank addr register at probe time
Read the flash bank addr register to get the state of bank in
a perticular flash. and also bank write happens only when there is
a change in bank selection from user.
bank read only valid for flashes which has > 16Mbytes those are
opearted in 3-byte addr mode, each bank occupies 16Mytes.
Suppose if the flash has 64Mbytes size consists of 4 banks like
bank0, bank1, bank2 and bank3.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/mtd/spi/spi_flash_internal.h')
| -rw-r--r-- | drivers/mtd/spi/spi_flash_internal.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index db6c444..00ed1ee 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -28,6 +28,8 @@ #define CMD_ERASE_64K 0xd8 #define CMD_ERASE_CHIP 0xc7 +#define SPI_FLASH_16MB_BOUN 0x1000000 + /* Manufacture ID's */ #define SPI_FLASH_SPANSION_IDCODE0 0x01 #define SPI_FLASH_STMICRO_IDCODE0 0x20 |