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author | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2013-12-30 22:16:23 +0530 |
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committer | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2014-01-11 16:51:41 +0530 |
commit | 9f4322fd2281d9736b9fd208a5e2ecaec49e21e0 (patch) | |
tree | abeb3b311527b22b8a32097fe499ddbdcc88f2e4 /drivers/mtd/spi/sf_internal.h | |
parent | 5bb30f1a40697e90945e6b80b9517bc7d44b94cb (diff) | |
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sf: Divide flash register ops from QEB code
QEB code comprises of couple of flash register read/write operations,
this patch moved flash register operations on to sf_op
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Diffstat (limited to 'drivers/mtd/spi/sf_internal.h')
-rw-r--r-- | drivers/mtd/spi/sf_internal.h | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h index c69b53d..c77961f 100644 --- a/drivers/mtd/spi/sf_internal.h +++ b/drivers/mtd/spi/sf_internal.h @@ -101,14 +101,17 @@ int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len, /* Flash erase(sectors) operation, support all possible erase commands */ int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len); +/* Read the status register */ +int spi_flash_cmd_read_status(struct spi_flash *flash, u8 *rs); + /* Program the status register */ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr); -/* Set quad enbale bit for macronix flashes */ -int spi_flash_set_qeb_mxic(struct spi_flash *flash); +/* Read the config register */ +int spi_flash_cmd_read_config(struct spi_flash *flash, u8 *rc); -/* Set quad enbale bit for winbond and spansion flashes */ -int spi_flash_set_qeb_winspan(struct spi_flash *flash); +/* Program the config register */ +int spi_flash_cmd_write_config(struct spi_flash *flash, u8 wc); /* Enable writing on the SPI flash */ static inline int spi_flash_cmd_write_enable(struct spi_flash *flash) |