summaryrefslogtreecommitdiff
path: root/drivers/mtd/nand
diff options
context:
space:
mode:
authorScott Wood <scottwood@freescale.com>2008-03-18 15:29:14 -0500
committerScott Wood <scottwood@freescale.com>2008-08-12 11:31:25 -0500
commit41ef8c716e93fdf50efe9c1ba733ca6675daaca6 (patch)
tree5bc8c792c197f2dbfb367c8a69228d0f374c9def /drivers/mtd/nand
parente52b34d40a8a646e3d11638ea8797e96398dba13 (diff)
downloadu-boot-imx-41ef8c716e93fdf50efe9c1ba733ca6675daaca6.zip
u-boot-imx-41ef8c716e93fdf50efe9c1ba733ca6675daaca6.tar.gz
u-boot-imx-41ef8c716e93fdf50efe9c1ba733ca6675daaca6.tar.bz2
Don't panic if a controller driver does ecc its own way.
Some hardware, such as the enhanced local bus controller used on some mpc83xx chips, does ecc transparently when reading and writing data, rather than providing a generic calculate/correct mechanism that can be exported to the nand subsystem. The subsystem should not BUG() when calculate, correct, or hwctl are missing, if the methods that call them have been overridden. Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'drivers/mtd/nand')
-rw-r--r--drivers/mtd/nand/nand_base.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 5661a8e..7bceea8 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2595,8 +2595,12 @@ int nand_scan_tail(struct mtd_info *mtd)
chip->ecc.write_oob = nand_write_oob_std;
case NAND_ECC_HW_SYNDROME:
- if (!chip->ecc.calculate || !chip->ecc.correct ||
- !chip->ecc.hwctl) {
+ if ((!chip->ecc.calculate || !chip->ecc.correct ||
+ !chip->ecc.hwctl) &&
+ (!chip->ecc.read_page ||
+ chip->ecc.read_page == nand_read_page_hwecc ||
+ !chip->ecc.write_page ||
+ chip->ecc.write_page == nand_write_page_hwecc)) {
printk(KERN_WARNING "No ECC functions supplied, "
"Hardware ECC not possible\n");
BUG();