diff options
author | Xiangfu Liu <xiangfu@openmobilefree.net> | 2011-10-12 12:24:06 +0800 |
---|---|---|
committer | Shinya Kuribayashi <skuribay@pobox.com> | 2011-10-10 22:06:12 +0900 |
commit | 80421fcc3ed1843f62a4a463548a4f33cdde362f (patch) | |
tree | 0e17b489ca37e73be16fbc1f85fd8b8c63cb773b /drivers/mtd/nand | |
parent | 0841ca90f22d73b0ea4642ef1ce33d879bb2f3ff (diff) | |
download | u-boot-imx-80421fcc3ed1843f62a4a463548a4f33cdde362f.zip u-boot-imx-80421fcc3ed1843f62a4a463548a4f33cdde362f.tar.gz u-boot-imx-80421fcc3ed1843f62a4a463548a4f33cdde362f.tar.bz2 |
MIPS: Ingenic XBurst Jz4740 processor support
Jz4740 is a multimedia application processor targeting for mobile
devices like e-Dictionary, eBook, portable media player (PMP) and
GPS navigator. Jz4740 is powered by Ingenic 360 MHz XBurst CPU core
(JzRISC), in which RISC/SIMD/DSP hybrid instruction set architecture
provides high integration, high performance and low power consumption.
JzRISC incorporated in Jz4740 is the advanced and power-efficient
32-bit RISC core, compatible with MIPS32, with 16K I-Cache and 16K
D-Cache, and can operate at speeds up to 400 MHz.
On-chip modules such as LCD controller, embedded audio codec, multi-
channel SAR-ADC, AC97/I2S controller and camera I/F offer a rich
suite of peripherals for multimedia application. NAND controller
(SLC/MLC), USB (host 1.1 and device 2.0), UART, I2C, SPI, etc. are
also available.
For more info about Ingenic XBurst Jz4740:
http://en.ingenic.cn/eng/
http://www.linux-mips.org/wiki/Ingenic
This patch introduces XBurst CPU support in U-Boot. It's compatible
with MIPS32, but requires a bit different cache maintenance, timer
routines, and boot mechanism using USB boot tool, so XBurst support
can go into a separate new home, cpu/xburst/.
Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Acked-by: Daniel <zpxu@ingenic.cn>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Diffstat (limited to 'drivers/mtd/nand')
0 files changed, 0 insertions, 0 deletions