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author | Stefano Babic <sbabic@denx.de> | 2012-03-21 23:56:17 +0000 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-03-27 22:05:29 +0200 |
commit | f7dad8f12164d08577b42492ae8d350a002e9d99 (patch) | |
tree | 5affb6901c590c9a02ff2c2a7937ae5efc1e3d2d /drivers/mtd/nand/omap_gpmc.c | |
parent | 0d63b33506a6d40a022a789085f5cb4e636ecaf8 (diff) | |
download | u-boot-imx-f7dad8f12164d08577b42492ae8d350a002e9d99.zip u-boot-imx-f7dad8f12164d08577b42492ae8d350a002e9d99.tar.gz u-boot-imx-f7dad8f12164d08577b42492ae8d350a002e9d99.tar.bz2 |
NAND: TI: fix warnings in omap_gpmc.c
The following warnings are reported for boards using SOFT ECC.
omap_gpmc.c:33:30: warning: 'hw_nand_oob' defined but not used
omap_gpmc.c:78:13: warning: 'omap_hwecc_init' defined but not used
omap_gpmc.c:116:12: warning: 'omap_correct_data' defined but not used
omap_gpmc.c:182:12: warning: 'omap_calculate_ecc' defined but not used
omap_gpmc.c:208:13: warning: 'omap_enable_hwecc' defined but not used
Signed-off-by: Stefano Babic <sbabic@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'drivers/mtd/nand/omap_gpmc.c')
-rw-r--r-- | drivers/mtd/nand/omap_gpmc.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index 1dfe074..ca868ef 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -27,10 +27,12 @@ #include <asm/arch/mem.h> #include <asm/arch/omap_gpmc.h> #include <linux/mtd/nand_ecc.h> +#include <linux/compiler.h> #include <nand.h> static uint8_t cs; -static struct nand_ecclayout hw_nand_oob = GPMC_NAND_HW_ECC_LAYOUT; +static __maybe_unused struct nand_ecclayout hw_nand_oob = + GPMC_NAND_HW_ECC_LAYOUT; /* * omap_nand_hwcontrol - Set the address pointers corretly for the @@ -75,7 +77,7 @@ int omap_spl_dev_ready(struct mtd_info *mtd) * @mtd: MTD device structure * */ -static void omap_hwecc_init(struct nand_chip *chip) +static void __maybe_unused omap_hwecc_init(struct nand_chip *chip) { /* * Init ECC Control Register @@ -113,7 +115,7 @@ static uint32_t gen_true_ecc(uint8_t *ecc_buf) * * @return 0 if data is OK or corrected, else returns -1 */ -static int omap_correct_data(struct mtd_info *mtd, uint8_t *dat, +static int __maybe_unused omap_correct_data(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc) { uint32_t orig_ecc, new_ecc, res, hm; @@ -179,8 +181,8 @@ static int omap_correct_data(struct mtd_info *mtd, uint8_t *dat, * @dat: unused * @ecc_code: ecc_code buffer */ -static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, - uint8_t *ecc_code) +static int __maybe_unused omap_calculate_ecc(struct mtd_info *mtd, + const uint8_t *dat, uint8_t *ecc_code) { u_int32_t val; @@ -205,7 +207,7 @@ static int omap_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, * @mtd: MTD device structure * @mode: Read/Write mode */ -static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode) +static void __maybe_unused omap_enable_hwecc(struct mtd_info *mtd, int32_t mode) { struct nand_chip *chip = mtd->priv; uint32_t val, dev_width = (chip->options & NAND_BUSWIDTH_16) >> 1; |