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authorWolfgang Denk <wd@denx.de>2010-01-21 22:02:21 +0100
committerWolfgang Denk <wd@denx.de>2010-01-21 22:02:21 +0100
commitd98acd729f5cc77064396ba817c5bb90fc691a9b (patch)
tree90ed4f238cd919de4c2ee451ab961089cd14e5dc /drivers/mtd/nand/mxc_nand.c
parent0d131ad9be8ca0a78f3f36a3914bee5c819fbf91 (diff)
parent38a8b3eafb17d61690e5fc93e6dc45120f79d7d0 (diff)
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Merge branch 'master' of git://git.denx.de/u-boot-nand-flash
Diffstat (limited to 'drivers/mtd/nand/mxc_nand.c')
-rw-r--r--drivers/mtd/nand/mxc_nand.c46
1 files changed, 43 insertions, 3 deletions
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index eb0323f..b2b612e 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -149,6 +149,43 @@ static struct nand_ecclayout nand_soft_eccoob = {
};
#endif
+static struct nand_ecclayout nand_hw_eccoob_largepage = {
+ .eccbytes = 20,
+ .eccpos = {6, 7, 8, 9, 10, 22, 23, 24, 25, 26,
+ 38, 39, 40, 41, 42, 54, 55, 56, 57, 58},
+ .oobfree = {{2, 4}, {11, 10}, {27, 10}, {43, 10}, {59, 5}, }
+};
+
+#ifdef CONFIG_MX27
+static int is_16bit_nand(void)
+{
+ struct system_control_regs *sc_regs =
+ (struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
+
+ if (readl(&sc_regs->fmcr) & NF_16BIT_SEL)
+ return 1;
+ else
+ return 0;
+}
+#elif defined(CONFIG_MX31)
+static int is_16bit_nand(void)
+{
+ struct clock_control_regs *sc_regs =
+ (struct clock_control_regs *)CCM_BASE;
+
+ if (readl(&sc_regs->rcsr) & CCM_RCSR_NF16B)
+ return 1;
+ else
+ return 0;
+}
+#else
+#warning "8/16 bit NAND autodetection not supported"
+static int is_16bit_nand(void)
+{
+ return 0;
+}
+#endif
+
static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t size)
{
uint32_t *d = dest;
@@ -808,8 +845,6 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command,
int board_nand_init(struct nand_chip *this)
{
- struct system_control_regs *sc_regs =
- (struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
struct mtd_info *mtd;
uint16_t tmp;
int err = 0;
@@ -871,10 +906,15 @@ int board_nand_init(struct nand_chip *this)
writew(0x4, &host->regs->nfc_wrprot);
/* NAND bus width determines access funtions used by upper layer */
- if (readl(&sc_regs->fmcr) & NF_16BIT_SEL)
+ if (is_16bit_nand())
this->options |= NAND_BUSWIDTH_16;
+#ifdef CONFIG_SYS_NAND_LARGEPAGE
+ host->pagesize_2k = 1;
+ this->ecc.layout = &nand_hw_eccoob_largepage;
+#else
host->pagesize_2k = 0;
+#endif
return err;
}