diff options
| author | Wolfgang Denk <wd@denx.de> | 2013-10-04 17:43:24 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-10-14 16:06:54 -0400 |
| commit | 93e1459641e758d2b096d3f1b39414a39bb314f8 (patch) | |
| tree | 3780156a164d3924a2412354872203e4b46f8592 /drivers/mtd/nand/fsl_elbc_spl.c | |
| parent | 3765b3e7bd0f8e46914d417f29cbcb0c72b1acf7 (diff) | |
| download | u-boot-imx-93e1459641e758d2b096d3f1b39414a39bb314f8.zip u-boot-imx-93e1459641e758d2b096d3f1b39414a39bb314f8.tar.gz u-boot-imx-93e1459641e758d2b096d3f1b39414a39bb314f8.tar.bz2 | |
Coding Style cleanup: replace leading SPACEs by TABs
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Drop changes for PEP 4 following python tools]
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'drivers/mtd/nand/fsl_elbc_spl.c')
| -rw-r--r-- | drivers/mtd/nand/fsl_elbc_spl.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/mtd/nand/fsl_elbc_spl.c b/drivers/mtd/nand/fsl_elbc_spl.c index a7476b4..2952135 100644 --- a/drivers/mtd/nand/fsl_elbc_spl.c +++ b/drivers/mtd/nand/fsl_elbc_spl.c @@ -59,20 +59,20 @@ static int nand_load_image(uint32_t offs, unsigned int uboot_size, void *vdst) if (large) { fmr |= FMR_ECCM; out_be32(®s->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) | - (NAND_CMD_READSTART << FCR_CMD1_SHIFT)); + (NAND_CMD_READSTART << FCR_CMD1_SHIFT)); out_be32(®s->fir, - (FIR_OP_CW0 << FIR_OP0_SHIFT) | - (FIR_OP_CA << FIR_OP1_SHIFT) | - (FIR_OP_PA << FIR_OP2_SHIFT) | - (FIR_OP_CW1 << FIR_OP3_SHIFT) | - (FIR_OP_RBW << FIR_OP4_SHIFT)); + (FIR_OP_CW0 << FIR_OP0_SHIFT) | + (FIR_OP_CA << FIR_OP1_SHIFT) | + (FIR_OP_PA << FIR_OP2_SHIFT) | + (FIR_OP_CW1 << FIR_OP3_SHIFT) | + (FIR_OP_RBW << FIR_OP4_SHIFT)); } else { out_be32(®s->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT); out_be32(®s->fir, - (FIR_OP_CW0 << FIR_OP0_SHIFT) | - (FIR_OP_CA << FIR_OP1_SHIFT) | - (FIR_OP_PA << FIR_OP2_SHIFT) | - (FIR_OP_RBW << FIR_OP3_SHIFT)); + (FIR_OP_CW0 << FIR_OP0_SHIFT) | + (FIR_OP_CA << FIR_OP1_SHIFT) | + (FIR_OP_PA << FIR_OP2_SHIFT) | + (FIR_OP_RBW << FIR_OP3_SHIFT)); } out_be32(®s->fbcr, 0); |