summaryrefslogtreecommitdiff
path: root/drivers/mtd/nand/atmel_nand.c
diff options
context:
space:
mode:
authorTom Rini <trini@konsulko.com>2016-06-04 08:49:47 -0400
committerTom Rini <trini@konsulko.com>2016-06-04 08:49:47 -0400
commit715b3a9b2486e8d7a32365d817c77209b35ee796 (patch)
tree5daa126a15d2e0d60156664d19adbf451324d098 /drivers/mtd/nand/atmel_nand.c
parentc41c649c2fdec7bf6ef84173597cc3feabdb7828 (diff)
parent667067faa18334f1e28c01b47530b5cce1b6182f (diff)
downloadu-boot-imx-715b3a9b2486e8d7a32365d817c77209b35ee796.zip
u-boot-imx-715b3a9b2486e8d7a32365d817c77209b35ee796.tar.gz
u-boot-imx-715b3a9b2486e8d7a32365d817c77209b35ee796.tar.bz2
Merge git://git.denx.de/u-boot-nand-flash
Diffstat (limited to 'drivers/mtd/nand/atmel_nand.c')
-rw-r--r--drivers/mtd/nand/atmel_nand.c126
1 files changed, 63 insertions, 63 deletions
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 7cc1de0..75e8307 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -160,8 +160,8 @@ static int pmecc_data_alloc(struct atmel_nand_host *host)
static void pmecc_gen_syndrome(struct mtd_info *mtd, int sector)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct atmel_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct atmel_nand_host *host = nand_get_controller_data(nand_chip);
int i;
uint32_t value;
@@ -177,8 +177,8 @@ static void pmecc_gen_syndrome(struct mtd_info *mtd, int sector)
static void pmecc_substitute(struct mtd_info *mtd)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct atmel_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct atmel_nand_host *host = nand_get_controller_data(nand_chip);
int16_t __iomem *alpha_to = host->pmecc_alpha_to;
int16_t __iomem *index_of = host->pmecc_index_of;
int16_t *partial_syn = host->pmecc_partial_syn;
@@ -227,8 +227,8 @@ static void pmecc_substitute(struct mtd_info *mtd)
*/
static void pmecc_get_sigma(struct mtd_info *mtd)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct atmel_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct atmel_nand_host *host = nand_get_controller_data(nand_chip);
int16_t *lmu = host->pmecc_lmu;
int16_t *si = host->pmecc_si;
@@ -383,8 +383,8 @@ static void pmecc_get_sigma(struct mtd_info *mtd)
static int pmecc_err_location(struct mtd_info *mtd)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct atmel_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct atmel_nand_host *host = nand_get_controller_data(nand_chip);
const int cap = host->pmecc_corr_cap;
const int num = 2 * cap + 1;
int sector_size = host->pmecc_sector_size;
@@ -437,8 +437,8 @@ static int pmecc_err_location(struct mtd_info *mtd)
static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc,
int sector_num, int extra_bytes, int err_nbr)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct atmel_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct atmel_nand_host *host = nand_get_controller_data(nand_chip);
int i = 0;
int byte_pos, bit_pos, sector_size, pos;
uint32_t tmp;
@@ -483,8 +483,8 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc,
static int pmecc_correction(struct mtd_info *mtd, u32 pmecc_stat, uint8_t *buf,
u8 *ecc)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct atmel_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct atmel_nand_host *host = nand_get_controller_data(nand_chip);
int i, err_nbr, eccbytes;
uint8_t *buf_pos;
@@ -513,7 +513,7 @@ normal_check:
if (err_nbr == -1) {
dev_err(host->dev, "PMECC: Too many errors\n");
mtd->ecc_stats.failed++;
- return -EIO;
+ return -EBADMSG;
} else {
pmecc_correct_data(mtd, buf_pos, ecc, i,
host->pmecc_bytes_per_sector, err_nbr);
@@ -529,7 +529,7 @@ normal_check:
static int atmel_nand_pmecc_read_page(struct mtd_info *mtd,
struct nand_chip *chip, uint8_t *buf, int oob_required, int page)
{
- struct atmel_nand_host *host = chip->priv;
+ struct atmel_nand_host *host = nand_get_controller_data(chip);
int eccsize = chip->ecc.size;
uint8_t *oob = chip->oob_poi;
uint32_t *eccpos = chip->ecc.layout->eccpos;
@@ -562,16 +562,16 @@ static int atmel_nand_pmecc_read_page(struct mtd_info *mtd,
stat = pmecc_readl(host->pmecc, isr);
if (stat != 0)
if (pmecc_correction(mtd, stat, buf, &oob[eccpos[0]]) != 0)
- return -EIO;
+ return -EBADMSG;
return 0;
}
static int atmel_nand_pmecc_write_page(struct mtd_info *mtd,
struct nand_chip *chip, const uint8_t *buf,
- int oob_required)
+ int oob_required, int page)
{
- struct atmel_nand_host *host = chip->priv;
+ struct atmel_nand_host *host = nand_get_controller_data(chip);
uint32_t *eccpos = chip->ecc.layout->eccpos;
int i, j;
int timeout = PMECC_MAX_TIMEOUT_US;
@@ -615,8 +615,8 @@ out:
static void atmel_pmecc_core_init(struct mtd_info *mtd)
{
- struct nand_chip *nand_chip = mtd->priv;
- struct atmel_nand_host *host = nand_chip->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
+ struct atmel_nand_host *host = nand_get_controller_data(nand_chip);
uint32_t val = 0;
struct nand_ecclayout *ecc_layout;
@@ -808,7 +808,8 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
struct atmel_nand_host *host;
int cap, sector_size;
- host = nand->priv = &pmecc_host;
+ host = &pmecc_host;
+ nand_set_controller_data(nand, host);
nand->ecc.mode = NAND_ECC_HW;
nand->ecc.calculate = NULL;
@@ -1080,7 +1081,7 @@ static int atmel_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip,
static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
u_char *read_ecc, u_char *isnull)
{
- struct nand_chip *nand_chip = mtd->priv;
+ struct nand_chip *nand_chip = mtd_to_nand(mtd);
unsigned int ecc_status;
unsigned int ecc_word, ecc_bit;
@@ -1111,7 +1112,7 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat,
* We can't correct so many errors */
dev_warn(host->dev, "atmel_nand : multiple errors detected."
" Unable to correct.\n");
- return -EIO;
+ return -EBADMSG;
}
/* if there's a single bit error : we can correct it */
@@ -1207,7 +1208,7 @@ int atmel_hwecc_nand_init_param(struct nand_chip *nand, struct mtd_info *mtd)
static void at91_nand_hwcontrol(struct mtd_info *mtd,
int cmd, unsigned int ctrl)
{
- struct nand_chip *this = mtd->priv;
+ struct nand_chip *this = mtd_to_nand(mtd);
if (ctrl & NAND_CTRL_CHANGE) {
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
@@ -1238,17 +1239,17 @@ static int at91_nand_ready(struct mtd_info *mtd)
#ifdef CONFIG_SPL_BUILD
/* The following code is for SPL */
-static nand_info_t mtd;
+static struct mtd_info *mtd;
static struct nand_chip nand_chip;
static int nand_command(int block, int page, uint32_t offs, u8 cmd)
{
- struct nand_chip *this = mtd.priv;
+ struct nand_chip *this = mtd_to_nand(mtd);
int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
- while (!this->dev_ready(&mtd))
+ while (!this->dev_ready(mtd))
;
if (cmd == NAND_CMD_READOOB) {
@@ -1256,24 +1257,24 @@ static int nand_command(int block, int page, uint32_t offs, u8 cmd)
cmd = NAND_CMD_READ0;
}
- hwctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
if ((this->options & NAND_BUSWIDTH_16) && !nand_opcode_8bits(cmd))
offs >>= 1;
- hwctrl(&mtd, offs & 0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
- hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE);
- hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE);
- hwctrl(&mtd, ((page_addr >> 8) & 0xff), NAND_CTRL_ALE);
+ hwctrl(mtd, offs & 0xff, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
+ hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE);
+ hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE);
+ hwctrl(mtd, ((page_addr >> 8) & 0xff), NAND_CTRL_ALE);
#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
- hwctrl(&mtd, (page_addr >> 16) & 0x0f, NAND_CTRL_ALE);
+ hwctrl(mtd, (page_addr >> 16) & 0x0f, NAND_CTRL_ALE);
#endif
- hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
+ hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
- hwctrl(&mtd, NAND_CMD_READSTART, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
- hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
+ hwctrl(mtd, NAND_CMD_READSTART, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
- while (!this->dev_ready(&mtd))
+ while (!this->dev_ready(mtd))
;
return 0;
@@ -1281,7 +1282,7 @@ static int nand_command(int block, int page, uint32_t offs, u8 cmd)
static int nand_is_bad_block(int block)
{
- struct nand_chip *this = mtd.priv;
+ struct nand_chip *this = mtd_to_nand(mtd);
nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
@@ -1304,7 +1305,7 @@ static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
static int nand_read_page(int block, int page, void *dst)
{
- struct nand_chip *this = mtd.priv;
+ struct nand_chip *this = mtd_to_nand(mtd);
u_char ecc_calc[ECCTOTAL];
u_char ecc_code[ECCTOTAL];
u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
@@ -1317,11 +1318,11 @@ static int nand_read_page(int block, int page, void *dst)
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
if (this->ecc.mode != NAND_ECC_SOFT)
- this->ecc.hwctl(&mtd, NAND_ECC_READ);
- this->read_buf(&mtd, p, eccsize);
- this->ecc.calculate(&mtd, p, &ecc_calc[i]);
+ this->ecc.hwctl(mtd, NAND_ECC_READ);
+ this->read_buf(mtd, p, eccsize);
+ this->ecc.calculate(mtd, p, &ecc_calc[i]);
}
- this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
+ this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
for (i = 0; i < ECCTOTAL; i++)
ecc_code[i] = oob_data[nand_ecc_pos[i]];
@@ -1330,35 +1331,35 @@ static int nand_read_page(int block, int page, void *dst)
p = dst;
for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize)
- this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
+ this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
return 0;
}
int spl_nand_erase_one(int block, int page)
{
- struct nand_chip *this = mtd.priv;
+ struct nand_chip *this = mtd_to_nand(mtd);
void (*hwctrl)(struct mtd_info *mtd, int cmd,
unsigned int ctrl) = this->cmd_ctrl;
int page_addr;
if (nand_chip.select_chip)
- nand_chip.select_chip(&mtd, 0);
+ nand_chip.select_chip(mtd, 0);
page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
- hwctrl(&mtd, NAND_CMD_ERASE1, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ hwctrl(mtd, NAND_CMD_ERASE1, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
/* Row address */
- hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE | NAND_CTRL_CHANGE);
- hwctrl(&mtd, ((page_addr >> 8) & 0xff),
+ hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE | NAND_CTRL_CHANGE);
+ hwctrl(mtd, ((page_addr >> 8) & 0xff),
NAND_CTRL_ALE | NAND_CTRL_CHANGE);
#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
/* One more address cycle for devices > 128MiB */
- hwctrl(&mtd, (page_addr >> 16) & 0x0f,
+ hwctrl(mtd, (page_addr >> 16) & 0x0f,
NAND_CTRL_ALE | NAND_CTRL_CHANGE);
#endif
- hwctrl(&mtd, NAND_CMD_ERASE2, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ hwctrl(mtd, NAND_CMD_ERASE2, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
- while (!this->dev_ready(&mtd))
+ while (!this->dev_ready(mtd))
;
nand_deselect();
@@ -1368,10 +1369,10 @@ int spl_nand_erase_one(int block, int page)
#else
static int nand_read_page(int block, int page, void *dst)
{
- struct nand_chip *this = mtd.priv;
+ struct nand_chip *this = mtd_to_nand(mtd);
nand_command(block, page, 0, NAND_CMD_READ0);
- atmel_nand_pmecc_read_page(&mtd, this, dst, 0, page);
+ atmel_nand_pmecc_read_page(mtd, this, dst, 0, page);
return 0;
}
@@ -1407,7 +1408,7 @@ int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
int at91_nand_wait_ready(struct mtd_info *mtd)
{
- struct nand_chip *this = mtd->priv;
+ struct nand_chip *this = mtd_to_nand(mtd);
udelay(this->chip_delay);
@@ -1438,7 +1439,7 @@ int board_nand_init(struct nand_chip *nand)
#ifdef CONFIG_ATMEL_NAND_HWECC
#ifdef CONFIG_ATMEL_NAND_HW_PMECC
- ret = atmel_pmecc_nand_init_params(nand, &mtd);
+ ret = atmel_pmecc_nand_init_params(nand, mtd);
#endif
#endif
@@ -1447,9 +1448,9 @@ int board_nand_init(struct nand_chip *nand)
void nand_init(void)
{
- mtd.writesize = CONFIG_SYS_NAND_PAGE_SIZE;
- mtd.oobsize = CONFIG_SYS_NAND_OOBSIZE;
- mtd.priv = &nand_chip;
+ mtd = &nand_chip.mtd;
+ mtd->writesize = CONFIG_SYS_NAND_PAGE_SIZE;
+ mtd->oobsize = CONFIG_SYS_NAND_OOBSIZE;
nand_chip.IO_ADDR_R = (void __iomem *)CONFIG_SYS_NAND_BASE;
nand_chip.IO_ADDR_W = (void __iomem *)CONFIG_SYS_NAND_BASE;
board_nand_init(&nand_chip);
@@ -1462,13 +1463,13 @@ void nand_init(void)
#endif
if (nand_chip.select_chip)
- nand_chip.select_chip(&mtd, 0);
+ nand_chip.select_chip(mtd, 0);
}
void nand_deselect(void)
{
if (nand_chip.select_chip)
- nand_chip.select_chip(&mtd, -1);
+ nand_chip.select_chip(mtd, -1);
}
#else
@@ -1482,10 +1483,9 @@ static ulong base_addr[CONFIG_SYS_MAX_NAND_DEVICE] = CONFIG_SYS_NAND_BASE_LIST;
int atmel_nand_chip_init(int devnum, ulong base_addr)
{
int ret;
- struct mtd_info *mtd = &nand_info[devnum];
struct nand_chip *nand = &nand_chip[devnum];
+ struct mtd_info *mtd = nand_to_mtd(nand);
- mtd->priv = nand;
nand->IO_ADDR_R = nand->IO_ADDR_W = (void __iomem *)base_addr;
#ifdef CONFIG_NAND_ECC_BCH
@@ -1521,7 +1521,7 @@ int atmel_nand_chip_init(int devnum, ulong base_addr)
ret = nand_scan_tail(mtd);
if (!ret)
- nand_register(devnum);
+ nand_register(devnum, mtd);
return ret;
}