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author | Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> | 2014-12-03 17:57:01 +0900 |
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committer | Nobuhiro Iwamatsu <iwamatsu@nigauri.org> | 2014-12-05 11:15:52 +0900 |
commit | 7a7eb983a4cd7531843de875572bf5a1c96297ca (patch) | |
tree | b4a74e7b876fafdf8941de8683421ddea8f84f6d /drivers/mmc | |
parent | 21ea350385149e0e96c51b2cac5e91cd4fd143bc (diff) | |
download | u-boot-imx-7a7eb983a4cd7531843de875572bf5a1c96297ca.zip u-boot-imx-7a7eb983a4cd7531843de875572bf5a1c96297ca.tar.gz u-boot-imx-7a7eb983a4cd7531843de875572bf5a1c96297ca.tar.bz2 |
mmc: sh_mmcif: Change maximum and minimum value of MMC clock
Maximum value and the minimum value of clock for sh_mmcif instead by
base of MMC clock. This removes fixed clock, make the changes to be calculated
according to environment.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r-- | drivers/mmc/sh_mmcif.c | 5 | ||||
-rw-r--r-- | drivers/mmc/sh_mmcif.h | 3 |
2 files changed, 5 insertions, 3 deletions
diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c index 8f386e2..3a2022c 100644 --- a/drivers/mmc/sh_mmcif.c +++ b/drivers/mmc/sh_mmcif.c @@ -579,8 +579,6 @@ static struct mmc_config sh_mmcif_cfg = { .host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT | MMC_MODE_8BIT | MMC_MODE_HC, .voltages = MMC_VDD_32_33 | MMC_VDD_33_34, - .f_min = CLKDEV_MMC_INIT, - .f_max = CLKDEV_EMMC_DATA, .b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT, }; @@ -597,6 +595,9 @@ int mmcif_mmc_init(void) host->regs = (struct sh_mmcif_regs *)CONFIG_SH_MMCIF_ADDR; host->clk = CONFIG_SH_MMCIF_CLK; + sh_mmcif_cfg.f_min = MMC_CLK_DIV_MIN(host->clk); + sh_mmcif_cfg.f_max = MMC_CLK_DIV_MAX; + mmc = mmc_create(&sh_mmcif_cfg, host); if (mmc == NULL) { free(host); diff --git a/drivers/mmc/sh_mmcif.h b/drivers/mmc/sh_mmcif.h index bd6fbf7..70034e2 100644 --- a/drivers/mmc/sh_mmcif.h +++ b/drivers/mmc/sh_mmcif.h @@ -199,7 +199,8 @@ struct sh_mmcif_regs { #define SOFT_RST_OFF (0 << 31) #define CLKDEV_EMMC_DATA 52000000 /* 52MHz */ -#define CLKDEV_MMC_INIT 400000 /* 100 - 400 KHz */ +#define MMC_CLK_DIV_MIN(clk) (clk / (1 << 8)) +#define MMC_CLK_DIV_MAX CLKDEV_EMMC_DATA #define MMC_BUS_WIDTH_1 0 #define MMC_BUS_WIDTH_4 2 |