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| author | Jaehoon Chung <jh80.chung@samsung.com> | 2016-07-26 19:03:49 +0900 |
|---|---|---|
| committer | Jaehoon Chung <jh80.chung@samsung.com> | 2016-08-05 11:21:25 +0900 |
| commit | e1ea7c44d67dde263c13e1aef300cab408236994 (patch) | |
| tree | 0f08e7e1be086383222195a6684e7bed5fb6b699 /drivers/mmc | |
| parent | 1bd4f92cdbc5f120c962611dfaf11ed01829d7cb (diff) | |
| download | u-boot-imx-e1ea7c44d67dde263c13e1aef300cab408236994.zip u-boot-imx-e1ea7c44d67dde263c13e1aef300cab408236994.tar.gz u-boot-imx-e1ea7c44d67dde263c13e1aef300cab408236994.tar.bz2 | |
mmc: sdhci: revert "mmc: sdhci: Claer high speed if not supported"
This "commit 429790026021d522d51617217d4b86218cca5750" is wrong.
SDHCI_QUIRK_NO_HISPD_BIT is for skipping to set CTRL_HISPD bit.
For example, Exynos didn't have CTRL_HISPD. But Highspeed mode
is supported.
(This quirks doesn't mean that driver didn't support the Highseepd mode.)
Note: If driver didn't support the Highspeed Mode, use or add the other
quirks.
After applied this patch, all Exynos SoCs are just running with 25MHz.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/sdhci.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 1d6d2fd..4112223 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -554,9 +554,6 @@ int sdhci_setup_cfg(struct mmc_config *cfg, const char *name, int buswidth, cfg->host_caps |= MMC_MODE_8BIT; } - if (quirks & SDHCI_QUIRK_NO_HISPD_BIT) - cfg->host_caps &= ~(MMC_MODE_HS | MMC_MODE_HS_52MHz); - if (host_caps) cfg->host_caps |= host_caps; |