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authorStephen Warren <swarren@wwwdotorg.org>2013-03-27 18:43:23 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2013-04-04 08:14:54 +0200
commit5eaa215607c8668bfa6a7183407eba8fec63d648 (patch)
tree84315e219ce066489ef830231a595f2427470dde /drivers/mmc
parent009d75ccc11d27b9a083375a88bb93cb746b4800 (diff)
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ARM: bcm2835: fix get_timer() to return ms
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer driver to conform to this. Have the timer implementation export a custom API get_timer_us() for use by the BCM2835 MMC API, which needs us resolution for a HW workaround. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/bcm2835_sdhci.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/mmc/bcm2835_sdhci.c b/drivers/mmc/bcm2835_sdhci.c
index b0afc3c..54cfabf 100644
--- a/drivers/mmc/bcm2835_sdhci.c
+++ b/drivers/mmc/bcm2835_sdhci.c
@@ -39,6 +39,7 @@
#include <common.h>
#include <malloc.h>
#include <sdhci.h>
+#include <asm/arch/timer.h>
/* 400KHz is max freq for card ID etc. Use that as min */
#define MIN_FREQ 400000
@@ -67,11 +68,11 @@ static inline void bcm2835_sdhci_raw_writel(struct sdhci_host *host, u32 val,
* (Which is just as well - otherwise we'd have to nobble the DMA engine
* too)
*/
- while (get_timer(bcm_host->last_write) < bcm_host->twoticks_delay)
+ while (get_timer_us(bcm_host->last_write) < bcm_host->twoticks_delay)
;
writel(val, host->ioaddr + reg);
- bcm_host->last_write = get_timer(0);
+ bcm_host->last_write = get_timer_us(0);
}
static inline u32 bcm2835_sdhci_raw_readl(struct sdhci_host *host, int reg)