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| author | Terry Lv <r65388@freescale.com> | 2011-08-12 12:54:58 +0800 |
|---|---|---|
| committer | Terry Lv <r65388@freescale.com> | 2011-09-01 11:45:02 +0800 |
| commit | 72ac6998a7700c2c64a4a7f4d6d44bbc980558f6 (patch) | |
| tree | 1c07090998bd507e3cde3c481e0fa859ec25a3d5 /drivers/mmc/imx_esdhc.c | |
| parent | d187eb3675f1408d206e9013bcde38793f5d1ca8 (diff) | |
| download | u-boot-imx-72ac6998a7700c2c64a4a7f4d6d44bbc980558f6.zip u-boot-imx-72ac6998a7700c2c64a4a7f4d6d44bbc980558f6.tar.gz u-boot-imx-72ac6998a7700c2c64a4a7f4d6d44bbc980558f6.tar.bz2 | |
ENGR00154666-3: Align u-boot mmc command with community
This patch will enhance mmc command.
1. Add erase command.
2. Abandon dev_no in mmc command. User need to switch slot with "mmc
dev" command.
3. Add mmc part switch command. Enhance partition switch support.
4. Add mmc bootpart. Boot partition support is more flexible.
Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'drivers/mmc/imx_esdhc.c')
| -rw-r--r-- | drivers/mmc/imx_esdhc.c | 29 |
1 files changed, 12 insertions, 17 deletions
diff --git a/drivers/mmc/imx_esdhc.c b/drivers/mmc/imx_esdhc.c index 093a1b2..052b747 100644 --- a/drivers/mmc/imx_esdhc.c +++ b/drivers/mmc/imx_esdhc.c @@ -204,8 +204,8 @@ esdhc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) /* Figure out the transfer arguments */ xfertyp = esdhc_xfertyp(cmd, data); - if (mmc->bus_width == EMMC_MODE_4BIT_DDR || - mmc->bus_width == EMMC_MODE_8BIT_DDR) + if (mmc->card_caps & EMMC_MODE_4BIT_DDR || + mmc->card_caps & EMMC_MODE_8BIT_DDR) xfertyp |= XFERTYP_DDR_EN; /* Send the command */ @@ -327,8 +327,8 @@ void set_sysctl(struct mmc *mmc, uint clock) div -= 1; /* for USDHC, pre_div requires another shift in DDR mode */ - if (cfg->is_usdhc && (mmc->bus_width == EMMC_MODE_4BIT_DDR || - mmc->bus_width == EMMC_MODE_8BIT_DDR)) + if (cfg->is_usdhc && (mmc->card_caps & EMMC_MODE_4BIT_DDR || + mmc->card_caps & EMMC_MODE_8BIT_DDR)) pre_div >>= 1; clk = (pre_div << 8) | (div << 4); @@ -451,15 +451,11 @@ static void esdhc_set_ios(struct mmc *mmc) } else if (mmc->bus_width == 8) { tmp = readl(®s->proctl) | PROCTL_DTW_8; writel(tmp, ®s->proctl); - } else if (mmc->bus_width == EMMC_MODE_4BIT_DDR) { - tmp = readl(®s->proctl) | PROCTL_DTW_4; - writel(tmp, ®s->proctl); - esdhc_dll_setup(mmc); - } else if (mmc->bus_width == EMMC_MODE_8BIT_DDR) { - tmp = readl(®s->proctl) | PROCTL_DTW_8; - writel(tmp, ®s->proctl); - esdhc_dll_setup(mmc); } + + if (mmc->card_caps & EMMC_MODE_4BIT_DDR || + mmc->card_caps & EMMC_MODE_8BIT_DDR) + esdhc_dll_setup(mmc); } static int esdhc_init(struct mmc *mmc) @@ -546,11 +542,11 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) mmc->host_caps = MMC_MODE_4BIT; if (caps & ESDHC_HOSTCAPBLT_HSS) - mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; + mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_HC; -/* Do not advertise DDR capability for uSDHC on MX50 since - * it is to be used in SDR mode only. Use eSDHC for DDR mode. - */ + /* Do not advertise DDR capability for uSDHC on MX50 since + * it is to be used in SDR mode only. Use eSDHC for DDR mode. + */ #ifndef CONFIG_MX50_ENABLE_USDHC_SDR if (cfg->is_usdhc) mmc->host_caps |= EMMC_MODE_4BIT_DDR; @@ -559,7 +555,6 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) if (detect_mmc_emmc_ddr_port(cfg)) mmc->host_caps |= EMMC_MODE_4BIT_DDR; #endif - #endif /* #ifndef CONFIG_MX50_ENABLE_USDHC_SDR */ mmc->f_min = 400000; |