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authorTerry Lv <r65388@freescale.com>2010-12-07 17:15:07 +0800
committerTerry Lv <r65388@freescale.com>2010-12-10 17:52:42 +0800
commitbb24c00fe03c58f9695b0f68e51f35c6c5982746 (patch)
tree932b4c0a78729bec2547f382ddfc73c73527739b /drivers/mmc/imx_esdhc.c
parent2f12abe42943096ac433b014ddaa9704682e7951 (diff)
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ENGR00136038: Remove config CONFIG_EMMC_DDR_MODE
1. As we can check DDR dynamically, remove CONFIG_EMMC_DDR_MODE in mmc.c. 2. Add config CONFIG_EMMC_DDR_PORT_DETECT config for some boards that only some board support DDR. Signed-off-by: Terry Lv <r65388@freescale.com>
Diffstat (limited to 'drivers/mmc/imx_esdhc.c')
-rw-r--r--drivers/mmc/imx_esdhc.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/mmc/imx_esdhc.c b/drivers/mmc/imx_esdhc.c
index f9a3ad6..c0eaa97 100644
--- a/drivers/mmc/imx_esdhc.c
+++ b/drivers/mmc/imx_esdhc.c
@@ -340,7 +340,8 @@ static void esdhc_dll_setup(struct mmc *mmc)
uint dll_control;
/* For i.MX50 TO1, need to force slave override mode */
- if (get_board_rev() == (0x50000 | CHIP_REV_1_0)) {
+ if (get_board_rev() == (0x50000 | CHIP_REV_1_0) ||
+ get_board_rev() == 0x53000) {
dll_control = readl(&regs->dllctrl);
dll_control &= ~(ESDHC_DLLCTRL_SLV_OVERRIDE_VAL_MASK |
@@ -491,6 +492,11 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
>> ESDHC_HOSTVER_VVN_SHIFT) >= ESDHC_HOSTVER_DDR_SUPPORT)
mmc->host_caps |= EMMC_MODE_4BIT_DDR;
+#ifdef CONFIG_EMMC_DDR_PORT_DETECT
+ if (detect_mmc_emmc_ddr_port(cfg))
+ mmc->host_caps |= EMMC_MODE_4BIT_DDR;
+#endif
+
mmc->f_min = 400000;
mmc->f_max = MIN(mxc_get_clock(MXC_ESDHC_CLK), 50000000);