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| author | Wang Huan <b18965@freescale.com> | 2014-09-05 13:52:40 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-09-08 10:30:34 -0700 |
| commit | 19060bd886381a58cfe335c2f13b6111ed936dd5 (patch) | |
| tree | 71794acccae4f7e40169d8201ffbf515c1750eb1 /drivers/mmc/fsl_esdhc.c | |
| parent | c82e9de400ee36038c76be67c5a6fb39c165ac1c (diff) | |
| download | u-boot-imx-19060bd886381a58cfe335c2f13b6111ed936dd5.zip u-boot-imx-19060bd886381a58cfe335c2f13b6111ed936dd5.tar.gz u-boot-imx-19060bd886381a58cfe335c2f13b6111ed936dd5.tar.bz2 | |
ls102xa: esdhc: Add esdhc support for LS102xA
For LS1, esdhc is big-endian IP. Accessing the registers
should be in big-endian mode. So we use esdhc_read32()
to read Host controller capabilities register for LS1.
For LS1, when using CMD12, cmdtype need to be set to
ABORT, otherwise, next read command will hang.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Diffstat (limited to 'drivers/mmc/fsl_esdhc.c')
| -rw-r--r-- | drivers/mmc/fsl_esdhc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 5541613..97d0389 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -96,7 +96,7 @@ static uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data) else if (cmd->resp_type & MMC_RSP_PRESENT) xfertyp |= XFERTYP_RSPTYP_48; -#if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) +#if defined(CONFIG_MX53) || defined(CONFIG_PPC_T4240) || defined(CONFIG_LS102XA) if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION) xfertyp |= XFERTYP_CMDTYP_ABORT; #endif @@ -561,7 +561,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg) memset(&cfg->cfg, 0, sizeof(cfg->cfg)); voltage_caps = 0; - caps = regs->hostcapblt; + caps = esdhc_read32(®s->hostcapblt); #ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135 caps = caps & ~(ESDHC_HOSTCAPBLT_SRS | |