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authorSimon Glass <sjg@chromium.org>2012-12-13 20:49:05 +0000
committerTom Rini <trini@ti.com>2013-02-04 09:05:44 -0500
commite9adeca3fc4fd9b353f2514daa7d799076ae079c (patch)
treef889e11f70411c773343006862d7e009a79605b9 /drivers/mmc/fsl_esdhc.c
parent225ca83dfea4f9b9a313c5233297132206bff431 (diff)
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ppc: arm: Move sdhc_clk into arch_global_data
This is used by both powerpc and arm, but I think it still qualifies as architecture-specific. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/mmc/fsl_esdhc.c')
-rw-r--r--drivers/mmc/fsl_esdhc.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 3d5c9c0..b90f3e7 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -583,7 +583,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
mmc->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
mmc->f_min = 400000;
- mmc->f_max = MIN(gd->sdhc_clk, 52000000);
+ mmc->f_max = MIN(gd->arch.sdhc_clk, 52000000);
mmc->b_max = 0;
mmc_register(mmc);
@@ -598,7 +598,7 @@ int fsl_esdhc_mmc_init(bd_t *bis)
cfg = malloc(sizeof(struct fsl_esdhc_cfg));
memset(cfg, 0, sizeof(struct fsl_esdhc_cfg));
cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
- cfg->sdhc_clk = gd->sdhc_clk;
+ cfg->sdhc_clk = gd->arch.sdhc_clk;
return fsl_esdhc_initialize(bis, cfg);
}
@@ -616,7 +616,7 @@ void fdt_fixup_esdhc(void *blob, bd_t *bd)
#endif
do_fixup_by_compat_u32(blob, compat, "clock-frequency",
- gd->sdhc_clk, 1);
+ gd->arch.sdhc_clk, 1);
do_fixup_by_compat(blob, compat, "status", "okay",
4 + 1, 1);