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authorSoren Brinkmann <soren.brinkmann@xilinx.com>2013-06-14 17:43:24 -0700
committerMichal Simek <michal.simek@xilinx.com>2013-08-12 08:52:01 +0200
commit5f93227ce02d9cafa11704c807a80dcbde129f8c (patch)
tree16d3a8a64791cac1a2047f16f65666c6e4ca28d7 /drivers/misc
parentfd2b10b6d6a0d5e94d6b34faa634e9722a5465a8 (diff)
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fpga: zynqpl: Clear loopback mode during device init
Some versions of the Zynq first stage boot loader enable PCAP loopback during boot regardless of whether or not the boot image includes PL configuration. This behavior only appears in certain boot modes (notably QSPI boot). Attempting to configure the PL with the loopback bit set will result in timeouts and will prevent successful configuration. In order to avoid this problem, and to avoid dependency on the version of the FSBL used to boot the system, ensure that the loopback enable bit is cleared when loading the driver. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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