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authorHaiying Wang <Haiying.Wang@freescale.com>2009-03-27 17:02:44 -0400
committerKumar Gala <galak@kernel.crashing.org>2009-03-30 13:33:51 -0500
commit22b6dbc1696d927d938dd4e16f65d83c0d4fb3f4 (patch)
tree611cd5baec5cb44cb29fc46a2d2d8f7fb8ba23e6 /drivers/misc/fsl_law.c
parent2d4de6ae5be54b367a72a7ef4e0cf36a9cd4881f (diff)
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MPC85xx: Add MPC8569 CPU support
There is a workaround for MPC8569 CPU Errata, which needs to set Bit 13 of LBCR in 4K bootpage. We setup a temp TLB for eLBC controller in bootpage, then invalidate it after LBCR bit 13 is set. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'drivers/misc/fsl_law.c')
-rw-r--r--drivers/misc/fsl_law.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 58340c1..be43a3e 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -35,7 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
#define FSL_HW_NUM_LAWS 8
#elif defined(CONFIG_MPC8548) || defined(CONFIG_MPC8544) || \
- defined(CONFIG_MPC8568) || \
+ defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) || \
defined(CONFIG_MPC8641) || defined(CONFIG_MPC8610)
#define FSL_HW_NUM_LAWS 10
#elif defined(CONFIG_MPC8536) || defined(CONFIG_MPC8572) || \