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authorSimon Glass <sjg@chromium.org>2015-02-13 12:20:47 -0700
committerSimon Glass <sjg@chromium.org>2015-02-19 06:19:18 -0700
commit6fb9ac15ebac4bcc4864be7958bf9b2b2b7420de (patch)
tree3fc5de24efde89c68df37bfe8f119958b4789211 /drivers/misc/Kconfig
parent1320112c8aa58345d71a5a46f3bf6a52589f1f2b (diff)
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dm: cros_ec: Convert to Kconfig
Since both I2C and SPI are converted to Kconfig, we can convert cros_ec to Kconfig for these buses. LPC will need to wait until driver mode PCI is available. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'drivers/misc/Kconfig')
-rw-r--r--drivers/misc/Kconfig48
1 files changed, 47 insertions, 1 deletions
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 813d1c2..0df25c3 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -1,3 +1,49 @@
+config CMD_CROS_EC
+ bool "Enable crosec command"
+ depends on CROS_EC
+ help
+ Enable command-line access to the Chrome OS EC (Embedded
+ Controller). This provides the 'crosec' command which has
+ a number of sub-commands for performing EC tasks such as
+ updating its flash, accessing a small saved context area
+ and talking to the I2C bus behind the EC (if there is one).
+
+config CROS_EC
+ bool "Enable Chrome OS EC"
+ help
+ Enable access to the Chrome OS EC. This is a separate
+ microcontroller typically available on a SPI bus on Chromebooks. It
+ provides access to the keyboard, some internal storage and may
+ control access to the battery and main PMIC depending on the
+ device. You can use the 'crosec' command to access it.
+
+config CROS_EC_I2C
+ bool "Enable Chrome OS EC I2C driver"
+ depends on CROS_EC
+ help
+ Enable I2C access to the Chrome OS EC. This is used on older
+ ARM Chromebooks such as snow and spring before the standard bus
+ changed to SPI. The EC will accept commands across the I2C using
+ a special message protocol, and provide responses.
+
+config CROS_EC_LPC
+ bool "Enable Chrome OS EC LPC driver"
+ depends on CROS_EC
+ help
+ Enable I2C access to the Chrome OS EC. This is used on x86
+ Chromebooks such as link and falco. The keyboard is provided
+ through a legacy port interface, so on x86 machines the main
+ function of the EC is power and thermal management.
+
+config CROS_EC_SPI
+ bool "Enable Chrome OS EC SPI driver"
+ depends on CROS_EC
+ help
+ Enable SPI access to the Chrome OS EC. This is used on newer
+ ARM Chromebooks such as pit, pi and nyan-big. The SPI interface
+ provides a faster and more robust interface than I2C but the bugs
+ are less interesting.
+
config DM_CROS_EC
bool "Enable Driver Model for Chrome OS EC"
depends on DM
@@ -5,5 +51,5 @@ config DM_CROS_EC
Enable driver model for the Chrome OS EC interface. This
allows the cros_ec SPI driver to operate with CONFIG_DM_SPI
but otherwise makes few changes. Since cros_ec also supports
- I2C and LPC (which don't support driver model yet), a full
+ LPC (which doesn't support driver model yet), a full
conversion is not yet possible.