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author | Marek Vasut <marex@denx.de> | 2016-04-04 21:16:18 +0200 |
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committer | Marek Vasut <marex@denx.de> | 2016-04-20 11:28:45 +0200 |
commit | 70ed80af46e58a25d472362fe5552e1e49eaf25b (patch) | |
tree | a6eec9f88741935b64ae39157a42f17aab48878e /drivers/input | |
parent | f3f777cdf00433866b1178e23a9a99e2eaf7d89e (diff) | |
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ddr: altera: Zero DM IN delay in scc_mgr_zero_group()
This one last set of delay configuration registers was not properly
zeroed out originally, fix it and zero them out.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>
Diffstat (limited to 'drivers/input')
0 files changed, 0 insertions, 0 deletions