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| author | Matt Reimer <mreimer@sdgsystems.com> | 2015-02-19 11:22:53 -0700 |
|---|---|---|
| committer | Pantelis Antoniou <pantelis.antoniou@konsulko.com> | 2015-02-23 19:52:00 +0200 |
| commit | f88a429f1179c9d9ab2883fba0ed0aa13c9bd72e (patch) | |
| tree | a9b67b3b9dfbe4a2027f9fd58c16a68ef1cd149b /drivers/input/cros_ec_keyb.c | |
| parent | 34dd928492fa020455d9b9f59fe4b643c0708306 (diff) | |
| download | u-boot-imx-f88a429f1179c9d9ab2883fba0ed0aa13c9bd72e.zip u-boot-imx-f88a429f1179c9d9ab2883fba0ed0aa13c9bd72e.tar.gz u-boot-imx-f88a429f1179c9d9ab2883fba0ed0aa13c9bd72e.tar.bz2 | |
mmc: sdhci: fix bus width switching on Samsung SoCs
Fix bus width switching from 8-bit mode down to 4-bit or 1-bit modes on
Samsung SoCs using SDHCI_QUIRK_USE_WIDE8. These SoCs report controller
version 2.0 yet they support 8-bit bus widths. If 8-bit mode was
previously enabled and then an operation like "mmc dev" caused a switch
back down to 4-bit or 1-bit mode, WIDE8 was left set, causing failures.
This problem was manifested by "mmc dev" timing out.
Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
Diffstat (limited to 'drivers/input/cros_ec_keyb.c')
0 files changed, 0 insertions, 0 deletions