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authorTroy Kisky <troy.kisky@boundarydevices.com>2012-04-24 17:33:25 +0000
committerHeiko Schocher <hs@denx.de>2012-07-11 10:54:29 +0200
commitde6f604de245b19ce2e330bc63b6522af134d7ae (patch)
treef73afbff36b87d9d48259b9b227849a6d77f990c /drivers/i2c/mxc_i2c.c
parent211e47549b668c7cdd8658c0413a272f0d0495d4 (diff)
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mxc_i2c: specify i2c base address in config file
The following platforms had their config files changed flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd and mx53loco. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'drivers/i2c/mxc_i2c.c')
-rw-r--r--drivers/i2c/mxc_i2c.c25
1 files changed, 4 insertions, 21 deletions
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index c88ac7c..416ffee 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -59,27 +59,10 @@ struct mxc_i2c_regs {
#define I2SR_IIF (1 << 1)
#define I2SR_RX_NO_AK (1 << 0)
-#if defined(CONFIG_SYS_I2C_MX31_PORT1)
-#define I2C_BASE 0x43f80000
-#define I2C_CLK_OFFSET 26
-#elif defined (CONFIG_SYS_I2C_MX31_PORT2)
-#define I2C_BASE 0x43f98000
-#define I2C_CLK_OFFSET 28
-#elif defined (CONFIG_SYS_I2C_MX31_PORT3)
-#define I2C_BASE 0x43f84000
-#define I2C_CLK_OFFSET 30
-#elif defined(CONFIG_SYS_I2C_MX53_PORT1)
-#define I2C_BASE I2C1_BASE_ADDR
-#elif defined(CONFIG_SYS_I2C_MX53_PORT2)
-#define I2C_BASE I2C2_BASE_ADDR
-#elif defined(CONFIG_SYS_I2C_MX35_PORT1)
-#define I2C_BASE I2C_BASE_ADDR
-#elif defined(CONFIG_SYS_I2C_MX35_PORT2)
-#define I2C_BASE I2C2_BASE_ADDR
-#elif defined(CONFIG_SYS_I2C_MX35_PORT3)
-#define I2C_BASE I2C3_BASE_ADDR
+#ifdef CONFIG_SYS_I2C_BASE
+#define I2C_BASE CONFIG_SYS_I2C_BASE
#else
-#error "define CONFIG_SYS_I2C_MX<Processor>_PORTx to use the mx I2C driver"
+#error "define CONFIG_SYS_I2C_BASE to use the mxc_i2c driver"
#endif
#define I2C_MAX_TIMEOUT 10000
@@ -114,7 +97,7 @@ static uint8_t i2c_imx_get_clk(unsigned int rate)
(struct clock_control_regs *)CCM_BASE;
/* start the required I2C clock */
- writel(readl(&sc_regs->cgr0) | (3 << I2C_CLK_OFFSET),
+ writel(readl(&sc_regs->cgr0) | (3 << CONFIG_SYS_I2C_CLK_OFFSET),
&sc_regs->cgr0);
#endif