summaryrefslogtreecommitdiff
path: root/drivers/i2c/mxc_i2c.c
diff options
context:
space:
mode:
authorTroy Kisky <troy.kisky@boundarydevices.com>2012-07-19 08:18:11 +0000
committerHeiko Schocher <hs@denx.de>2012-07-31 07:46:06 +0200
commit71e9f3cbeb99ad696b2034748092dfc93f67bf73 (patch)
tree6184736423c885b79e72388d26d2679b0b8e7478 /drivers/i2c/mxc_i2c.c
parentd45e75b10cff8b388c9ec2e9fe3d4484bf1ba943 (diff)
downloadu-boot-imx-71e9f3cbeb99ad696b2034748092dfc93f67bf73.zip
u-boot-imx-71e9f3cbeb99ad696b2034748092dfc93f67bf73.tar.gz
u-boot-imx-71e9f3cbeb99ad696b2034748092dfc93f67bf73.tar.bz2
mxc_i2c: place imx_start code inline
imx_start is only referenced once so move to that location. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
Diffstat (limited to 'drivers/i2c/mxc_i2c.c')
-rw-r--r--drivers/i2c/mxc_i2c.c53
1 files changed, 20 insertions, 33 deletions
diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index 83c2fab..9efa9bd 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -201,37 +201,6 @@ static int tx_byte(struct mxc_i2c_regs *i2c_regs, u8 byte)
}
/*
- * Start the controller
- */
-int i2c_imx_start(void)
-{
- struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
- unsigned int temp = 0;
- int result;
-
- /* Enable I2C controller */
- writeb(0, &i2c_regs->i2sr);
- writeb(I2CR_IEN, &i2c_regs->i2cr);
-
- /* Wait controller to be stable */
- udelay(50);
-
- /* Start I2C transaction */
- temp = readb(&i2c_regs->i2cr);
- temp |= I2CR_MSTA;
- writeb(temp, &i2c_regs->i2cr);
-
- result = wait_for_sr_state(i2c_regs, ST_BUS_BUSY);
- if (result < 0)
- return result;
-
- temp |= I2CR_MTX | I2CR_TX_NO_AK;
- writeb(temp, &i2c_regs->i2cr);
-
- return 0;
-}
-
-/*
* Stop the controller
*/
void i2c_imx_stop(void)
@@ -259,10 +228,28 @@ void i2c_imx_stop(void)
static int i2c_init_transfer(struct mxc_i2c_regs *i2c_regs,
uchar chip, uint addr, int alen)
{
- int ret = i2c_imx_start();
- if (ret)
+ unsigned int temp;
+ int ret;
+
+ /* Enable I2C controller */
+ writeb(0, &i2c_regs->i2sr);
+ writeb(I2CR_IEN, &i2c_regs->i2cr);
+
+ /* Wait for controller to be stable */
+ udelay(50);
+
+ /* Start I2C transaction */
+ temp = readb(&i2c_regs->i2cr);
+ temp |= I2CR_MSTA;
+ writeb(temp, &i2c_regs->i2cr);
+
+ ret = wait_for_sr_state(i2c_regs, ST_BUS_BUSY);
+ if (ret < 0)
goto exit;
+ temp |= I2CR_MTX | I2CR_TX_NO_AK;
+ writeb(temp, &i2c_regs->i2cr);
+
/* write slave address */
ret = tx_byte(i2c_regs, chip << 1);
if (ret < 0)