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authorMark Asselstine <[mark.asselstine@windriver.com]>2009-10-27 19:40:40 +0530
committerTom Rix <Tom.Rix@windriver.com>2009-11-27 16:26:12 -0600
commitc88ed4cb2eed29a690ac6689ed1dc2f5e9547d15 (patch)
tree2004a627776de86f4269d937fb4a27dd1a92e83b /drivers/i2c/Makefile
parent9829cabbaa0474e94075bf7d62c99bdba996518b (diff)
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sheevaplug: correct SDRAM address control register
value The SheevaPlug DevKit is shipped with 4x8 by 1Gb DDR devices in two banks for a total of 512MB of RAM. Based on this configuration the existing values for SDRAM address control register are incorrect and result in random kernel oops as memory is incorrectly accessed (while for example extracting a large tarball such as a rootfs). Based on the hardware configuration along with the supporting documentation from Marvell these are the correct values, as well this change mimics values previously used in Marvell's own u-boot git tree for the SheevaPlug. Other variants of the hardware such as the PogoPlug and TonidoPlug may have different memory configurations but to properly support those additional board directories should be maintained or a better system to support other kwb*.cfg is needed. Tested on SheevaPlug DevKit. Signed-off-by: Mark Asselstine <mark.asselstine@windriver.com>
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