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authorStephen Warren <swarren@nvidia.com>2014-01-24 12:46:07 -0700
committerTom Warren <twarren@nvidia.com>2014-02-03 09:46:46 -0700
commit41cd530d6d9b4fb3c2ab475cb92f1242400b5fb1 (patch)
tree3beb627bd527d95316667ab941e1c00894889c33 /drivers/hwmon
parenta73ca4789fddce35936dd8decb1522f08b6cb620 (diff)
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ARM: tegra: misc cleanups triggered by Tegra124 review
Use a named constant for the PLL lock bit in enable_cpu_clocks(). Construct the complete value of pmc_pwrgate_toggle, rather than doing a read-modify-write; the register is simple enough and doesn't need to maintain state between operations. Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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